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Mark Irvine Greenberg

dblp:187/2336 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1988
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing › parallelization strategies
implicit parallelism		 0.011988
Flagship: A Parallel Architecture for Declarative Programming · ISCA 1988
Parallel and multicore computing
parallel architecture		 0.011988
Flagship: A Parallel Architecture for Declarative Programming · ISCA 1988
Parallel and multicore computing › load balancing
dynamic load balancing		 0.011988
Flagship: A Parallel Architecture for Declarative Programming · ISCA 1988
Parallel and multicore computing › parallel architecture
parallel machine design		 0.011988
Flagship: A Parallel Architecture for Declarative Programming · ISCA 1988

Methods — techniques the papers use, named apart from their topics

operational evaluation · 0.0
YearPublicationVenuePosition
1988 Flagship: A Parallel Architecture for Declarative Programming
abstract
The Flagship project aims to produce a computing technology based on the declarative style of programming. A major component of that technology is the design for a parallel machine that can efficiently utilize the implicit parallelism in declarative programs. The computational models that expose this implicit parallelism are described, and an architecture designed to use it is outlined. The operational issues, such as dynamic load balancing, that arise in such a system are discussed, and the mechanisms being used to evaluate the architecture are described.>
Ian Watson, Viv Woods, Paul Watson 0001, Richard Banach, Mark Irvine Greenberg, John Sargeant
 ISCA5