Demo Data from VLDB 2026 / reviewers in the wild / expert
Koh Chuen Hoa
dblp:189/1046
· DBLP profile ↗
2ranked-venue papers
0as first author
1since 2021 · last 2021
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 1 · 1 since 2021Software engineering, systems software and programming languages · 1Theory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 50% Distributed systems · 50% | |
| Software engineering, system software, and programming languages
1 paper |
Program verification · 100% |
Topics — the 2 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Distributed systems
formal specification |
0.2 | 1 | 2016 | An Executable Formalisation of the SPARCv8 Instruction Set Architecture: A Case Study for the LEON3 Processor · FM 2016 |
Processor architecture and microarchitecture
instruction set architecture |
0.2 | 1 | 2016 | An Executable Formalisation of the SPARCv8 Instruction Set Architecture: A Case Study for the LEON3 Processor · FM 2016 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | An Isabelle/HOL Formalisation of the SPARC Instruction Set Architecture and the TSO Memory Model
David Sanán, Alwen Tiu, Yang Liu 0003, Koh Chuen Hoa, Jin Song Dong 0001 |
J. Autom. Reason. | 5 |
| 2016 | An Executable Formalisation of the SPARCv8 Instruction Set Architecture: A Case Study for the LEON3 Processor
David Sanán, Alwen Tiu, Yang Liu 0003, Koh Chuen Hoa |
FM | 5 |