We developed a high-performance programmable SISO decoder LSI for decoding turbo codes based on the SW-log-BCJR algorithm. This LSI is based on the original architecture and memory management method, which guarantees the order of the soft-output to be the same as soft-input without attaching LIFO memory. Moreover, we propose new accurate implementation on 4-input log-sum operations used in the recursion of /spl alpha/ and /spl beta/ for codes of rate 2/3 and 3/3. This technique enables high operating frequency and low coding loss simultaneously. The interleaver and inevitable delay lines required to realize the turbo decoders are embedded on the chip so the most turbo code applications, including parallel concatenated convolutional codes (PCCC), serial concatenated convolutional codes (SCCC), turbo trellis coded modulation (TTCM) and serial concatenated trellis coded modulation (SCTCM), can easily be implemented scalably by cascading this LSI. The LSI is fully programmable for code types, code polynomials and interleaver patterns and applicable for BPSK, QPSK and 8-PSK with arbitrary signal constellation. An operating frequency of 100 MHz is achieved using CMOS 0.25 /spl mu/m process whereas the coding loss according to implementation is kept within 0.03 dB.

We introduce a class of nonlinear cyclic error-correcting codes, which we call subspace subcodes of Reed-Solomon (SSRS) codes. An SSRS code is a subset of a parent Reed-Solomon (RS) code consisting of the RS codewords whose components all lie in a fixed /spl nu/-dimensional vector subspace S of GF (2/sup m/). SSRS codes are constructed using properties of the Galois field GF(2/sup m/). They are not linear over the field GF(2/sup /spl nu//), which does not come into play, but rather are Abelian group codes over S. However, they are linear over GF(2), and the symbol-wise cyclic shift of any codeword is also a codeword. Our main result is an explicit but complicated formula for the dimension of an SSRS code. It implies a simple lower bound, which gives the true value of the dimension for most, though not all, subspaces. We also prove several important duality properties. We present some numerical examples, which show, among other things, that (1) SSRS codes can have a higher dimension than comparable subfield subcodes of RS codes, so that even if GF(2/sup /spl nu//) is a subfield of GF(2/sup m/), it may not be the best /spl nu/-dimensional subspace for constructing SSRS codes; and (2) many high-rate SSRS codes have a larger dimension than any previously known code with the same values of n, d, and q, including algebraic-geometry codes. These examples suggest that high-rate SSRS codes are promising candidates to replace Reed-Solomon codes in high-performance transmission and storage systems.