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U. V. Wali

dblp:19/720 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 1986
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 91% Performance modeling and evaluation · 5% Interconnection networks and networks-on-chip · 4%

Topics — the 6 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
circuit simulation		 0.021986
Compact Modified Nodal Approach for Switched-Capacitor Network Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986
On the modified nodal approach to network analysis · Proc. IEEE 1985
Electronic design automation › circuit simulation › numerical methods for circuit simulation
modified nodal analysis		 0.021986
Compact Modified Nodal Approach for Switched-Capacitor Network Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986
On the modified nodal approach to network analysis · Proc. IEEE 1985
Electronic design automation › circuit analysis
analog circuit analysis		 0.011986
Compact Modified Nodal Approach for Switched-Capacitor Network Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986
Electronic design automation › circuit simulation › analog circuit simulation
switched-capacitor network analysis		 0.011986
Compact Modified Nodal Approach for Switched-Capacitor Network Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986
Performance modeling and evaluation › statistical analysis
sensitivity analysis		 0.011986
Compact Modified Nodal Approach for Switched-Capacitor Network Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986
Interconnection networks and networks-on-chip
switching network		 0.011985
On the modified nodal approach to network analysis · Proc. IEEE 1985

Methods — techniques the papers use, named apart from their topics

cutset analysis · 0.0compact MNA formulation · 0.0matrix reduction · 0.0cutset reduction · 0.0
YearPublicationVenuePosition
1986 Compact Modified Nodal Approach for Switched-Capacitor Network Analysis
abstract
A method based on cutset analysis is presented to compact the network matrices written in the modified nodal formalism. Operational amplifier models with finite as well as infinite gain have been used. Simple algorithms for frequency response and sensitivity analyses based on these compact MNA equations are presented. The algorithms have been tested on a small 8086 based system.
U. V. Wali, Ranendra N. Pal, B. Chatterjee
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1985 On the modified nodal approach to network analysis
abstract
An algorithm to reduce the size of MNA matrices for switched and nonswitched networks is proposed through the use of cutsets. The procedure is simple and eliminates all diagonal zeros. Closed switches and EMF sources are handled identically. The final size of the matrix may be reduced to the number of nodes when no current-controlled elements are present.
U. V. Wali, Ranendra N. Pal, B. Chatterjee
 Proc. IEEE1