Abstract Deterministic random bit generators (DRBGs) are essential tools in modern cryptography for generating secure and unpredictable random numbers. The ISO DRBG standards provide guidelines for designing and implementing DRBGs, including four algorithms: $$\textsf{HASH}\text {-}\textsf{DRBG}$$ HASH - DRBG , $$\textsf{HMAC}\text {-}\textsf{DRBG}$$ HMAC - DRBG , $$\textsf{CTR}\text {-}\textsf{DRBG}$$ CTR - DRBG , and $$\textsf{OFB}\text {-}\textsf{DRBG}$$ OFB - DRBG . While security analyses have been conducted for the former three algorithms, there is a lack of specific security analysis for the $$\textsf{OFB}$$ OFB - $$\textsf{DRBG}$$ DRBG algorithm. We prove its security in the robustness security framework that has been used to analyze $$\mathsf {CTR\text {-}DRBG}$$ CTR - DRBG by Hoang and Shen at Crypto 2020. More precisely, we prove that $$\textsf{OFB}$$ OFB - $$\textsf{DRBG}$$ DRBG provides $$O(\min \left\{ \frac{\lambda }{3}, \frac{n}{2} \right\} )$$ O ( min λ 3 , n 2 ) -bit security, including ideal cipher queries, where $$\lambda $$ λ and n denote the lower bound of min-entropy and the size of the underlying block cipher, respectively. The proof strategy is to transform the robustness game of $$\textsf{OFB}$$ OFB - $$\textsf{DRBG}$$ DRBG into an indistinguishability game and then apply the H-coefficient technique to upper bound the distinguishing advantage.

Semiglobal matching is an accurate stereo depth estimation algorithm, whereas implementing the high-throughput architecture has been challenging due to the inherent recursion on inter-pixel cost aggregation. Especially, the computation on horizontal scan pass is the critical path causing the throughput bottleneck. In this paper, we propose a new cluster-wise cost aggregation algorithm and its optimized architecture that enables to pipeline the inter-pixel aggregation and parallelize the scanline-level disparity computation. The proposed approach is performed not on every pixel but on each group of pixels, which significantly alleviates the timing constraint for the recursion. The disparity values at shifted multiple pixel positions are concurrently computed within a single clock period. We also propose the memory reduction scheme selecting a tiny number of informative values, which achieves 96% memory reduction compared to the straightforward approach storing overall values. The system-on-chip-based tiled processing scheme is employed, which allows the implementation without an external memory. The proposed architecture computes a depth map with 128 disparity levels at 103 frames per second on a full HD image on the Zynq ultrascale+ MPSoC platform, thus providing 2.6 times faster performance with a comparable accuracy compared to the state-of-the-art 8-path semiglobal matching implementation.

Accurate stereo matching requires a large amount of memory at a high bandwidth, which restricts its use in resource-limited systems such as mobile devices. This problem is compounded by the recent trend of applications requiring significantly high pixel resolution and disparity levels. To alleviate this, we present a memory-efficient and robust stereo matching algorithm. For cost aggregation, we employ the semiglobal parametric approach, which significantly reduces the memory bandwidth by representing the costs of all disparities as a Gaussian mixture model. All costs on multiple paths in an image are aggregated by updating the Gaussian parameters. The aggregation is performed during the scanning in the forward and backward directions. To reduce the amount of memory for the intermediate results during the forward scan, we suggest to store only the Gaussian parameters which contribute significantly to the final disparity selection. We also propose a method to enhance the overall procedure through a learning-based confidence measure. The random forest framework is used to train various features which are extracted from the cost and intensity profile. The experimental results on KITTI dataset show that the proposed method reduces the memory requirement to less than 3 percent of that of semiglobal matching (SGM) while providing a robust depth map compared to those of state-of-the-art SGM-based algorithms.

Numerous camera sensors have been recently proposed to estimate the depth of objects in the scene. However, many of these sensors either require multiple imaging elements or an active illuminant. In this paper, we propose a new depth camera, termed offset aperture (OA) camera, which provides depth of the scene with a single shot without an active illuminant. The camera is based on a 4-color sensor that senses the infrared (IR) signal along with the visible RGB signals. Separate OAs are used for IR and RGB images. A depth-dependent disparity is generated between the IR and RGB images. There is no disparity across the R, G, and B channel images, which allows the RGB image to be well-aligned. Numerous techniques are used in this work to observe good-quality depth maps and images. Leakage compensation has been proposed to remove crosstalk between the IR and RGB images. A comparison with another 4-color sensor called Dual Aperture camera shows that OA camera provides 88% improvement in depth sensitivity and 45% improvement in color quality, on average. The proposed OA camera can be used for numerous applications including occlusion handling in stereo, selective focus, and night vision. The advantages of the proposed OA camera include competitive image quality, capability of depth extraction, well-aligned RGB images, and small footprint of the camera, which make OA camera a suitable candidate for mobile applications.

This paper presents a Offset Aperture (OA) based single camera system and proposes a optimized vision processor, a new hardware architecture for fast, low-energy, and low-complexity depth extraction. The proposed design was fabricated in 110nm CMOS image sensor technology and supports 32-level depth resolution on 1920×1080 full HD image with 30fps, consuming 280.53mW from 1.5V supply and a mere 2.8% of bad classification. The low-complexity algorithms are employed to eliminate the DRAM access, thereby the proposed OA architecture can be directly embedded with the CMOS image sensor and commercial image processing chip.

Accurate stereo matching for depth extraction requires a large memory space, which restricts its use in resource-limited systems. The problem is aggravated by the recent trend of applications requiring significantly high pixel resolution and disparity levels. To alleviate the high memory requirement, we propose to represent the aggregation costs as a Gaussian mixture model (GMM) function. Only a set of GMM parameters is stored and used instead of all the costs for each pixel. We also propose GMM parameter update-based aggregation along multiple paths. To preserve the accuracy of the disparity map, we employ a depth confidence measure and propose an update rule for the slanted surface of an object. Experimental results over the KITTI dataset show that the proposed method reduces the memory requirement to less than 5% of that of semiglobal matching, while the accuracy is maintained at the level of state-of-the-art semiglobal and local methods.

Due to the increasing demand for 3D applications, development of novel depth-sensing cameras is being actively pursued. However, most of these cameras still face the challenge of high energy consumption and slow speed in the depth extraction process. This becomes a serious bottleneck in embedded implementations where real-time performance is required, constrained by power and area. This work proposes Offset Aperture (OA) camera, a new hardware architecture for fast, low-energy, and low-complexity depth extraction. Optimal implementations of pre-processing, cost-volume generation and cost-aggregation are presented. The whole depth-extraction pipeline has been implemented on a Field Programmable Gate Array (FPGA). Overall, a mere 2.8% of bad classification was achieved with the proposed system. Also, the proposed system can process 37 VGA frames per second while consuming 0.224 μJ/pixel. High accuracy, speed and low energy consumption of the proposed OA architecture make it suitable for embedded applications.