A new broadband DC-bias included model for radio frequency (RF) power transistors is presented in this paper. The proposed method utilizes the canonical section-wise piecewise linear (CSWPL) model framework in order to incorporate both frequency as well as bias information simultaneously. Detailed descriptions of the fundamental theory of the developed model are provided, along with their validation through experiments. The model is implemented in commercial software and validated using DC and RF tests with measured load-pull data from a 10-W GaN device. In contrast to standard and bias-included CSWPL models, this model can predict transistor behavior under a variety of bias voltages and frequencies using only one set of parameters, thereby significantly reducing model complexity. Additionally, the proposed model is applied to a multi-octave PA design to provide further validation. Measurements made on the realized PA are compared to simulations based on the proposed model. Validity of the extracted model is confirmed by the agreement between measurements and simulations.

This paper introduces a new method for designing power amplifiers (PAs) using a flexible, automatic approach. It employs a Gaussian process-assisted fast non-dominated sorting genetic algorithm (GP-NSGA-II) for both circuit synthesis and layout optimization. Traditional genetic algorithms are computationally intensive and have poor convergence, making them difficult to use with three-dimensional full-wave simulators. To address these issues, the authors incorporate Gaussian process regression from Bayesian optimization into NSGA-II, improving convergence and computational efficiency. The method integrates layout simulation and optimization, enabling automatic PA design with direct layout optimization. To demonstrate the method’s effectiveness, the authors design a wide-band PA and a tri-band PA using a 10-W gallium-nitride (GaN) high electron mobility transistor (HEMT). The tests show that the prototypes perform well: the wide-band PA has a power-added efficiency (PAE) of over 61% and an output power greater than 41.5 dBm in the 2-3 GHz band, while the tri-band PA achieves PAE values of over 59%, 55%, and 57% in the 0.7-1.1 GHz, 2.3-2.5 GHz, and 3.4-3.5 GHz bands, respectively, with output powers exceeding 41.2 dBm, 40.6 dBm, and 40.6 dBm.

In this work, the thresholds of the decomposed vector rotation (DVR) model for radio frequency (RF) power amplifiers (PAs) which based on canonical piecewise linear (CPWL) function, has been analyzed and optimized. The particle swarm optimization (PSO) algorithm is employed, and the thresholds of the DVR model is optimized to achieve the optimal performance. The basic theory and modeling procedure of the proposed technique are presented. Both Doherty PA (DPA) and sequential load modulated balanced amplifier (SLMBA) are used for experimental validation. Compared to the conventional Volterra-based model, the standard DVR model, the proposed PSO-based DVR (PSO-DVR) model present huge improvement. Compared with existing simultaneous perturbation stochastic approximation (SPSA) algorithm-based threshold optimization method, the optimization iteration number can be greatly reduced, which means the optimization efficiency is improved.

Artificial intelligence (AI) techniques are increasingly being used for the inverse design of microwave devices. However, several challenges, including intensive computation costs for training samples, high-dimensional data, nonuniformity, and low-quality samples in the design space, can negatively impact the final modeling performance. To alleviate these issues, a high-quality sampling inverse design scheme incorporating wavelet transform deep learning (HQS-WTDL) is proposed to achieve customized, automated microwave filter design. In the forward simulation-based sampling, particle swarm optimization (PSO) is used to tentatively select rule-defined samples. Multilabel synthetic minority over-sampling technique (MLSMOTE) is then applied to enlarge the training samples and improve their uniformity in the design space. An inverse modeling approach using neural networks to map the nonlinear relationship between a given set of S-parameters and required filter structural parameters is presented. Given that the dimension of the S-parameters is much higher than that of the structure parameters, the corresponding neural network used in this approach is deep and complex, with multiple layers and neurons. To reduce the number of input variables, the S-parameters are subjected to wavelet transformation, allowing for more efficient representation by the neural network. The proposed method is validated using a band-pass microstrip hairpin filter as an example. Results demonstrate that the proposed approach achieves better modeling effectiveness and inverse design efficiency than conventional methods. In addition, the proposed method allows for fast customization of device parameters, such as center frequencies and bandwidths with good prediction accuracy.

In this article, a multi-objective particle swarm optimization (MPSO) method is presented for the design of a sequential load modulation balanced amplifier (SLMBA). Based on the proposed method, the matching networks of the control amplifier (CA) and balanced amplifier (BA) are optimized separately in order to achieve optimal load modulation behavior. Furthermore, the effect of the phase offset line of the SLMBA is analyzed and optimized. In order to validate the proposed method, a SLMBA with a frequency range of 1.8 GHz to 2.1 GHz was implemented and measured. Consequently, it is capable of achieving a saturation drain efficiency (DE) of 70.1%-74.3%, a saturated output power of 43.7 dBm, and a DE of 52.3%-57.9% with 10.5-dB output back-off (OBO). In order to improve the linearity of the manufactured SLMBA, a digital pre-distortion method has been implemented, and a 20 MHz 5GNR signal has been used to test the device with good results.

In this article, an overall optimization strategy of power amplifier (PA) based on Bayesian algorithm is proposed to perform multiple multiobjective optimization design of sequential load modulated balanced amplifier (SLMBA). Specifically, by combining the programming language in MATLAB with commercial electronic design automation (EDA) software, such as advanced design system (ADS), the joint optimization process can be achieved. Then, the complex load modulation can be achieved and high-drain efficiency (DE) at various output power back-off (OBO) levels can be obtained by using the proposed overall optimization strategy, which proves the superiority of the combined optimization strategy in optimizing SLMBA compared with the optimization algorithms embedded in ADS. To verify the proposed optimization strategy, a prototype operating at 1.8–2.1 GHz was demonstrated and implemented using Gallium Nitride (GaN) transistors. A high-back-off efficiency SLMBA is simulated and measured, which the measured saturated total output power reaches 42.7–43.5 dBm with 75.8%–81.2% DE and 55%–62.5% DE at 10-dB power back-off. After that, digital pre-distortion (DPD) is implemented to further improve the linearity of the designed SLMBA with 20-MHz 5G NR signal, and good performance is achieved.

In this article, a novel frequency-domain behavioral modeling approach for gallium-nitride (GaN) devices is presented. The proposed technique is based on using the canonical section-wise piecewise linear (CSWPL) model framework to interpolate the dc input and output bias voltages by a 2-D polynomial function. The basic theory associated with the developed model is described in detail and experimentally verified. The model is implemented in a commercial software and, then, validated through both dc and radio frequency (RF) tests with measured load-pull data from 6-W GaN devices. The achieved results demonstrate an excellent prediction capability, thereby proving the accuracy of the developed modeling methodology. Compared with the standard CSWPL model, the proposed model is able to predict the transistor behavior at different bias voltages with one single set of parameters, which greatly reduces the model complexity as well as the required extraction time. Compared with existing bias included models, the proposed solution shows accurate predictions over a wide range of input power levels and bias conditions, simultaneously. Additionally, the proposed model is utilized for a broadband power amplifier (PA) design for a further validation. The measurements carried out on the realized PA are compared with the simulations based on the proposed model. The comparison is performed at four different bias conditions. The agreement between measurements and simulations confirms the extracted model’s validity.

The article proposes a modified series compensation (MSC) outphasing power amplifier (OPA) that maximizes saturation output power and extends power back-off range. The proposed OPA enables achieving output power back-off (OBO) compensation without affecting the saturation matching. Then, the circuit structure is simplified by introducing a post-matching circuit to integrate the combiner and the reactive compensation network (RCN). Moreover, a simplified dual-impedance matching network (DIMN) is placed between each transistor and the output combiner, leading to increased OBO range with improved efficiency. This technique not only takes into consideration the influence of parasitic parameters but also match the required impedance at both saturation and OBO points, simultaneously. The above design idea is successfully verified by using the gallium nitride (GaN) high-electron-mobility transistor (HEMT) to develop an OPA circuit operating at 2.6 GHz, providing 45.2 dBm of peak output power. At the 12-dB output back-off point, the drain efficiency reaches 61.5%. In addition, the prototype achieves values of the adjacent channel leakage ratio (ACLR) equal to -48.17 dBc and 47.74 dBc for LTE modulated signal with 8 dB PAPR value and for 5G NR signal with 11.7 dB PAPR value, respectively.

In this work, the design of a load-modulated balanced power amplifier (LMBA), which is composed of a pair of classical balanced power amplifier (BA) and a signal control power amplifier (CA), based on using the X-parameter model is presented for the first time. A 10-W gallium nitride (GaN) packaged transistor is used for the power amplifier (PA) design. The extracted X-parameter model of the device under test (DUT) can accurately predict the nonlinear behavioral of the device, including both fundamental and harmonic characteristics, and determine the region of the Smith chart that leads to the optimal output power and drain efficiency (DE), with which the BA and CA are designed. In order to facilitate the application of the X-parameter for LMBA design, the X-parameter model of the classical BA pair is further extracted. Finally, an LMBA is fabricated and tested to verify the validity of the proposed design methodology. The measurements performed on the developed prototype show a saturation output power of up to 43.2 dBm in the frequency range of 1.3–1.6 GHz, with a saturation DE over 73% and an output power back-off (OBO) efficiency over 51% when it has more than 9-dB OBO. A single-carrier 20-MHz long-term evolution (LTE) signal is used to test the designed PA, and performance of the amplifier both with and without linearization are given.