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Ingrid Kovacs

dblp:195/1173 · DBLP profile ↗
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2ranked-venue papers
1as first author
1since 2021 · last 2022
0000-0002-6734-7207ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 62% Integrated circuit design · 38%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
analog and mixed-signal circuits
0.612022
Modeling the Dependency of Analog Circuit Performance Parameters on Manufacturing Process Variations With Applications in Sensitivity Analysis and Yield Prediction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
Electronic design automation › yield analysis
process variation modeling
0.612022
Modeling the Dependency of Analog Circuit Performance Parameters on Manufacturing Process Variations With Applications in Sensitivity Analysis and Yield Prediction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
Electronic design automation › hardware verification and test
hardware verification
0.212022
Modeling the Dependency of Analog Circuit Performance Parameters on Manufacturing Process Variations With Applications in Sensitivity Analysis and Yield Prediction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
Electronic design automation › hardware verification and test › functional verification
pre-silicon verification
0.212022
Modeling the Dependency of Analog Circuit Performance Parameters on Manufacturing Process Variations With Applications in Sensitivity Analysis and Yield Prediction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022

Methods — techniques the papers use, named apart from their topics

monte carlo simulation · 0.6machine learning regression · 0.6feature selection · 0.6bayesian optimization · 0.6
YearPublicationVenuePosition
2022 Modeling the Dependency of Analog Circuit Performance Parameters on Manufacturing Process Variations With Applications in Sensitivity Analysis and Yield Prediction
abstract
There is a consistent dependence between integrated circuits (ICs) performance parameters and manufacturing process variations and capturing it at an early development phase represents a major ongoing topic in the semiconductor industry. Typically, this is addressed by the means of Monte Carlo (MC) simulations, where the device model parameters are randomly instantiated according to the technology variations based on a predefined nominal process. Thus, the resulted simulation data can only capture the effect of these variations. This offers little or no insight on the performance’s sensitivities to specific process variations or on the effect of altered statistical technology properties, as it may be the case of process drift or fab-to-fab migration. This article proposes a methodology for modeling the dependency of the device performances (i.e., electrical parameters—EPs) with the influential technology parameters (i.e., process control monitor parameters—PCMs), at an early stage (preSilicon). Using a set of standard MC co-simulations of PCM structures and the circuit schematics (to maintain consistent process variation), it employs a feature selection step to choose the influential PCMs and it trains a machine learning regression algorithm. Both are wrapped up in a Bayesian optimization (BO) framework to find the optimal feature set and the regression hyperparameters. The obtained regression model can explain the functional dependency of the EP on the influential PCMs. Thus, it directly enables sensitivity analysis (SA) to process variation and parametric yield prediction of the IC, as it will be illustrated for the case of an experimental Infineon Technologies product.
Elena-Diana Sandru, Emilian David, Ingrid Kovacs, Andi Buzo, Corneliu Burileanu, Georg Pelz
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
2017 Integrated circuits' characterization for non-normal data in semiconductor quality analysis
abstract
The standard metrics for integrated circuits' analysis and characterization in production processes usually assume that the process under investigation is characterized by a normal distribution. However, the data met in practice are not always normal and the yield estimates may be inaccurate. In this paper we propose estimating the yield by using a distribution fitting flow. The selected distribution types proved to estimate more accurate yields, with lower variance of the estimates. The distribution models proved to be a reliable tool also for integrated circuits' characterization in terms of specification limits' determination.
Ingrid Kovacs, Marina Dana Topa, Andi Buzo, Georg Pelz
ETS1