Demo Data from VLDB 2026 / reviewers in the wild / expert
Lin-Chun Yong
dblp:195/4123
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2017
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 61% Embedded and real-time systems · 30% Energy-efficient computing · 9% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Embedded and real-time systems › embedded hardware platform
multicore embedded systems |
0.3 | 1 | 2017 | ROHOM: Requirement-Aware Online Hybrid On-Chip Memory Management for Multicore Systems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2017 |
Memory systems › memory management
on-chip memory management |
0.3 | 1 | 2017 | ROHOM: Requirement-Aware Online Hybrid On-Chip Memory Management for Multicore Systems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2017 |
Memory systems › on-chip memory
scratchpad memory |
0.3 | 1 | 2017 | ROHOM: Requirement-Aware Online Hybrid On-Chip Memory Management for Multicore Systems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2017 |
Energy-efficient computing › power-performance tradeoff
energy-delay product optimization |
0.1 | 1 | 2017 | ROHOM: Requirement-Aware Online Hybrid On-Chip Memory Management for Multicore Systems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2017 |
Methods — techniques the papers use, named apart from their topics
requirement-aware scheduling · 0.3online allocation · 0.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2017 | ROHOM: Requirement-Aware Online Hybrid On-Chip Memory Management for Multicore SystemsabstractMany studies have shown that energy consumption of on-chip memory is a critical issue for multicore embedded systems. In order to reduce energy consumption, scratchpad memory (SPM), a software controlled on-chip memory, has been increasingly used. In a typical multicore embedded system that uses SPM in the on-chip memory, each core has local SPM and can access data in both local SPM and SPMs of other cores (i.e., remote SPM). Since the latency and energy of accessing remote SPMs is higher than accessing local SPM, how data are allocated in local and remote SPMs influences the performance and energy consumption of the system. This paper proposes a requirement-aware online hybrid on-chip memory management (ROHOM) method. This method contains an SPM supervisor that determines the SPM allocation of each task according to the dynamic access behavior and SPM requirements of the task. In addition, two policies: 1) free remote SPM space first and 2) get local SPM space first, are proposed in ROHOM to reduce the access frequency of remote SPMs. The experimental results show ROHOM can reduce energy delay product up to 69% (42% on average) in an 8-core system and up to 69% (50% on average) in a 16-core system when compared to a contention aware SPM allocation method. The hardware area overhead is insignificant (about 1.8%). Da-Wei Chang, Ing-Chao Lin, Lin-Chun Yong |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |