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Ciyan Zheng

dblp:196/6958 · DBLP profile ↗
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6ranked-venue papers
1as first author
3since 2021 · last 2026
0000-0002-6511-192XORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 1 first-author · 2 since 2021Artificial intelligence and machine learning · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Emerging computing paradigms · 70% Integrated circuit design · 30%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
analog and mixed-signal circuits
0.812024
The First Implementation of a Memtranstor Emulator and its Artificial Synaptic Plasticity Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024
Emerging computing paradigms
neuromorphic computing
0.812024
The First Implementation of a Memtranstor Emulator and its Artificial Synaptic Plasticity Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024
Emerging computing paradigms › neuromorphic computing
synaptic plasticity
0.812024
The First Implementation of a Memtranstor Emulator and its Artificial Synaptic Plasticity Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024
Emerging computing paradigms › neuromorphic computing
memristive devices
0.212024
The First Implementation of a Memtranstor Emulator and its Artificial Synaptic Plasticity Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024

Methods — techniques the papers use, named apart from their topics

PSPICE simulation · 0.8
YearPublicationVenuePosition
2026 Data-driven Parameter Design Method for Memristive LIF Neuron Circuits
Yujiao Dong, Yidan Mao, Ciyan Zheng
ISCAS6
2024 The First Implementation of a Memtranstor Emulator and its Artificial Synaptic Plasticity Analysis
abstract
Memtranstor (MT) is proposed as a complement to the concept of memory element, which is conceived based on a direct correlation between magnetic flux φ and charge q. The electrical characteristics of MT is different from other memory elements, which enables MT to have more application scenarios. Thus, we design a floating MT emulator containing a constitutive DC control voltage vs to mimic a hardware MT. In this emulator, the inverse memtranstance (MT-1) can be directly measured and divided into two different states, namely, state 1: MT-1 is always positive or always negative, state 2: MT-1 is either positive or negative. We propose a control method of changing the direction and magnitude of the electric field of vs to achieve these two different states. For the proposed MT emulator, we also analyze typical nonlinear characteristics of pinched hysteresis loops (PHLs) and the variation of MT-1 under different vs and sinusoidal excitation frequencies. The correctness and feasibility of the emulator have been systematically validated through theoretical analysis, PSpice simulation, and hardware experiments. To further demonstrate the potential application of MT, we verify artificial synaptic plasticity of the MT emulator by experiments. The experiments results show that MT emulator can resemble long-term potentiation and long-term depression. The proposed MT emulator has a certain reference value for future research of MT-based nonlinear dynamics and can facilitate MT-based application research.
Ciyan Zheng, Jian Cen, Herbert H. C. Iu
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2023 Drift speed adaptive memristor model
Ya Li 0008, Lijun Xie, Pingdan Xiao, Ciyan Zheng, Qinghui Hong
Neural Comput. Appl.4
2018 Cascading Failure Model Considering Multi-Step Attack Strategy
abstract
Modeling and analysis of cascading failures draws wide attention recently due to frequent occurrences of large blackouts all over the world. Models based on complex network theory contribute significantly on analyzing the robustness of power systems and assessing the risk probability, while they fall short of producing the propagation of the cascading failure in exact time points. This paper presents an improved topological model taking timescale into consideration, as well as the relay setting which reveals its operation more accurately according to industrial standards. The paper then validates the model using UIUC 150-bus and IEEE 39-bus test system. In order to assess the vulnerability of a power network, the multi-step attack strategy has been provided. The results demonstrate that timescales and relay settings have a critical impact during the cascading failure and the proposed attack strategy may lead to larger blackouts than normal strategies.
Hengdao Guo, Herbert H. C. Iu, Tyrone Fernando, Ciyan Zheng, Xi Zhang 0007, C. K. Michael Tse
ISCAS4
2018 Neuromorphic Vision Hybrid RRAM-CMOS Architecture
abstract
The development of a bioinspired image sensor, which can match the functionality of the vertebrate retina, has provided new opportunities for vision systems and processing through the realization of new architectures. Research in both retinal cellular systems and nanodriven memristive technology has made a challenging arena more accessible to emulate features of the retina that are closer to biological systems. This paper synthesizes the signal flow path of photocurrent throughout a retina in a scalable 180-nm CMOS technology, which initiates at a 128 × 128 active pixel image sensor, and converges to a 16 × 16 array, where each node emits a spike train synonymous to the function of the retinal ganglionic output cell. This signal can be sent to the visual cortex for image interpretation as part of an artificial vision system. Layers of memristive networks are used to emulate the functions of horizontal and amacrine cells in the retina, which average and converge signals. The resulting image matches biologically verified results within an error margin of 6% and exhibits the following features of the retina: lateral inhibition, asynchronous adaptation, and a low-dynamic-range integration active pixel sensor to perceive a high-dynamic-range scene.
Jason Kamran Eshraghian, Kyoung-Rok Cho, Ciyan Zheng, Minho Nam, Herbert H. C. Iu, Wen Lei
IEEE Trans. Very Large Scale Integr. Syst.3
2015 A memristive astable multivibrator based on 555 timer
abstract
The main purpose of this paper is to explore the oscillating characteristics of an astable multivibrator based on memristor and 555 timer. An analog circuit is utilized to simulate magnetic flux controlled memristor and then applied to implement the astable multivibrator. The voltage across the memristor emulator is analytically calculated. Simulation is carried out to confirm the theoretical analysis. The agreement between simulation and analytical calculation validates the feasibility of using memritor to achieve astable multivibrator.
Dongsheng Yu, Ciyan Zheng, Herbert H. C. Iu, Tyrone Fernando
ISCAS2