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Eric E. Johnson

dblp:20/5895 · DBLP profile ↗
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6ranked-venue papers
2as first author
0since 2021 · last 2004
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 3 · 1 first-authorSystems, architecture and hardware · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 1Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Performance modeling and evaluation · 73% Electronic design automation · 27%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › design space exploration
microarchitecture design space exploration
0.012002
Toward reducing processor simulation time via dynamic reduction of microarchitecture complexity · SIGMETRICS 2002
Performance modeling and evaluation › simulation
processor simulation
0.012002
Toward reducing processor simulation time via dynamic reduction of microarchitecture complexity · SIGMETRICS 2002
Performance modeling and evaluation
trace compression
0.012001
Lossless Trace Compression · IEEE Trans. Computers 2001
Performance modeling and evaluation
workload characterization
0.012001
Lossless Trace Compression · IEEE Trans. Computers 2001

Methods — techniques the papers use, named apart from their topics

dynamic model complexity reduction · 0.0cycle-accurate simulation · 0.0PDATS · 0.0
YearPublicationVenuePosition
2004 Queueing analysis of DCHF and token-passing protocols with varying turnaround time
abstract
Wireless networks are generally characterized by a medium shared among a group of users. This makes an appropriate media access control (MAC) protocol essential for efficient channel utilization. Wireless MAC protocols show significant performance degradation in some challenging networks (e.g., military HF radio) that are characterized by long link-layer turnaround times, and most of the recent research does not address this problem. This paper develops queueing models for two functional categories of wireless MAC protocols; DCHF, a contention-based MAC protocol and token-passing, a contention-free MAC protocol, and explores their statistical performance for varying link-layer turnaround times under varying Poisson loads. Simulation models for these protocols have been developed to substantiate the statistical analysis.
Manikanden Balakrishnan, Eric E. Johnson
IPCCC2
2003 Fuzzy routing in ad hoc networks
abstract
Routing and related resource allocation issues present special challenges in ad hoc networks. Typically, every node in an ad hoc network serves as a router for other nodes, and paths from source to destination often require multiple hops. Compared to wired networks, wireless ad hoc networks have less bandwidth, longer paths, and less stable connectivity, all of which render routing protocols from wired networks less suitable for the wireless world. This paper presents a novel routing scheme for ad hoc networks that applies fuzzy logic to differentiated resource allocation, considering traffic importance and network state. Messages are routed over zero or more maximally disjoint paths to the destination: important packets may be forwarded redundantly over multiple disjoint paths for increased reliability, while less important traffic may be suppressed at the source. The performance of fuzzy routing is evaluated using simulation, and is compared to dynamic source routing (DSR) and split multipath routing (SMR) wireless routing protocols.
Gasim Alandjani, Eric E. Johnson
IPCCC2
2002 Toward reducing processor simulation time via dynamic reduction of microarchitecture complexity
abstract
As processor microarchitectures continue to increase in complexity, so does the time required to explore the design space. Performing cycle-accurate, detailed timing simulation of a realistic workload on a proposed processor microarchitecture often incurs a prohibitively large time cost. We propose a method to reduce the time cost of simulation by dynamically varying the complexity of the processor model throughout the simulation. In this paper, we give first evidence of the feasibility of this approach. We demonstrate that there are significant amounts of time during a simulation where a reduced processor model accurately tracks important behavior of a full model, and that by simulating the reduced model during these times the total simulation time can be reduced. Finally, we discuss metrics for detecting areas where the two processor models track each other, which is crucial for dynamically deciding when to use a reduced rather than a full model.
Jeanine E. Cook, Richard L. Oliver, Eric E. Johnson
SIGMETRICS3
2001 Lossless Trace Compression
abstract
The tremendous storage space required for a useful data base of program traces has prompted a search for trace reduction techniques. In this paper, we discuss a range of information-lossless address and instruction trace compression schemes that can reduce both storage space and access time by an order of magnitude or more, without discarding either references or interreference timing information from the original trace. The PDATS family of trace compression techniques achieves trace coding densities of about six references per byte. This family of techniques is now in use as the standard in the NMSU TraceBase, an extensive trace archive that has been established for use by the international research and teaching community.
Eric E. Johnson, Jiheng Ha, Baqar Zaidi
IEEE Trans. Computers1
2000 Using an Artificial Neural Network to Detect Activations during Ventricular Fibrillation
Melanie T. Young, Susan M. Blanchard, Mark W. White, Eric E. Johnson, William M. Smith, Raymond E. Ideker
Comput. Biomed. Res.4
1999 PDATS II: improved compression of address traces
abstract
The tremendous storage space required for a useful data base of memory reference traces has prompted a search for trace compaction techniques. PDATS is the standard trace format used in the NMSU TraceBase, a widely used archive of memory and instruction traces. The PDATS family of trace compression techniques achieves trace coding densities of about six references per byte with no loss of reference type or address information by using differential run-length encoding. This paper proposes an improvement on the PDATS scheme that doubles the typical compression ratio without losing information.
Eric E. Johnson
IPCCC1