VLDB 2026 Research / reviewers in the wild / expert
Silvan Streit
dblp:200/2053
· DBLP profile ↗
3ranked-venue papers
1as first author
2since 2021 · last 2026
0000-0002-5822-2402ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Security and privacy · 2 · 2 since 2021Systems, architecture and hardware · 1 · 1 first-author
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Breaking ECDSA with Electromagnetic Side-Channel Attacks: Challenges and Practicality on Modern Smartphones
Felix Oberhansl, Marc Schink, Nisha Jacob Kabakci, Michael Gruber, Dominik Klein 0001, Sven Freud, Tobias Damm, Michael Hartmeier, Ivan Gavrilan, Silvan Streit, Jonas Stappenbeck, Andreas Zankl |
EuroS&P | 10 |
| 2025 | A Generic Framework for Side-Channel Attacks Against LWE-Based Cryptosystems
Julius Hermelink, Silvan Streit, Erik Mårtensson, Richard Petri 0001 |
EUROCRYPT (8) | 2 |
| 2018 | Post-Quantum Key Exchange on ARMv8-A: A New Hope for NEON Made SimpleabstractNEWHOPE and NEWHOPE-SIMPLE are two recently proposed post-quantum key exchange protocols based on the hardness of the Ring-LWE problem. Due to their high security margins and performance, there have already been discussions and proposals for integrating them into Internet standards, like TLS, and anonymity network protocols, like Tor. In this work, we present constant-time and vector-optimized implementations of NEWHOPE and NEWHOPE-SIMPLE for ARMv8-A 64-bit processors which target high-speed applications. This architecture is implemented in a growing number of smart phone and tablet processors, and features powerful 128-bit SIMD operations provided by the NEON engine. In particular, we propose the use of three alternative modular reduction methods. They allow to better exploit NEON parallelism by avoiding larger data types during the Number Theoretic Transform (NTT). Furthermore, they remove the need to transform input coefficients into Montgomery domain during pointwise multiplications. The NEON vectorized NTT uses a 16-bit unsigned integer representation and executes in only 18,909 clock cycles on an ARM Cortex-A53 core. Our implementation improves previous assembly-optimized results on ARM NEON platforms and outperforms the C reference implementation on the same platform by a factor of 8.3. The total time spent on the key exchange was reduced by more than a factor of 3.5 for both protocols. Silvan Streit, Fabrizio De Santis |
IEEE Trans. Computers | 1 |