Demo Data from VLDB 2026 / reviewers in the wild / expert
M. Ramya
dblp:201/6677
· DBLP profile ↗
2ranked-venue papers
2as first author
1since 2021 · last 2026
0000-0002-0871-816XORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 1 · 1 first-authorSystems, architecture and hardware · 1 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware reliability and fault tolerance · 67% Integrated circuit design · 33% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
semiconductor device modeling |
1.0 | 1 | 2026 | Single-Event Transient Analysis on NCringFET Devices and Inverter Circuits Utilizing Numerical Device Simulations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Hardware reliability and fault tolerance › soft errors
single event transient |
1.0 | 1 | 2026 | Single-Event Transient Analysis on NCringFET Devices and Inverter Circuits Utilizing Numerical Device Simulations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Hardware reliability and fault tolerance
soft errors |
1.0 | 1 | 2026 | Single-Event Transient Analysis on NCringFET Devices and Inverter Circuits Utilizing Numerical Device Simulations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Methods — techniques the papers use, named apart from their topics
heavy ion irradiation analysis · 1.03D-TCAD simulation · 1.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Single-Event Transient Analysis on NCringFET Devices and Inverter Circuits Utilizing Numerical Device SimulationsabstractThe heavy ion radiation performance of NCringFET with single and dual-k spacers using both the inner and outer drain arrangements are investigated using 3D TCAD simulations. DC performance parameters, including ON current (Ion), OFF current (Ioff), and Ion/Ioffratio, are obtained for all NCringFET structures. The behavior of NCringFET to heavy ion irradiation is analyzed, and the device’s susceptible area is identified via single-event transient analysis. It was discovered that the most susceptible area for an inner drain arrangement is the centre of the drain, whereas the most susceptible area for an outer drain arrangement is the spacer near the drain. The source region is the least susceptible area for both outer and inner drain arrangements. Also, the single-event transient performance of NCringFET-based Inverters using both outer and inner drain arrangements are examined. NCringFET with an inner drain arrangement exhibits improved performance in radiation-prone areas due to its reduced collected charge, making it a more suitable choice for applications requiring high reliability and radiation tolerance at both the device level and circuit level. M. Ramya, K. K. Nagarajan, Kumar Prasannajit Pradhan |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2017 | Certain investigation on iris image recognition using hybrid approach of Fourier transform and Bernstein polynomials
M. Ramya, V. Krishnaveni, K. S. Sridharan |
Pattern Recognit. Lett. | 1 |