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David C. J. Naylor

dblp:201/9228 · DBLP profile ↗
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3ranked-venue papers
3as first author
0since 2021 · last 1995
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 2 · 2 first-authorSystems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 53% Hardware accelerators and domain-specific architectures · 16% Parallel and multicore computing · 16%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation
analytical modeling
0.011994
A Performance Model for Multilayer Neural Networks in Linear Arrays · IEEE Trans. Parallel Distributed Syst. 1994
Interconnection networks and networks-on-chip
interconnection networks
0.011994
A Performance Model for Multilayer Neural Networks in Linear Arrays · IEEE Trans. Parallel Distributed Syst. 1994
Parallel and multicore computing › array processor
linear array
0.011994
A Performance Model for Multilayer Neural Networks in Linear Arrays · IEEE Trans. Parallel Distributed Syst. 1994
Hardware accelerators and domain-specific architectures › machine learning accelerator
neural network accelerator
0.011994
A Performance Model for Multilayer Neural Networks in Linear Arrays · IEEE Trans. Parallel Distributed Syst. 1994

Methods — techniques the papers use, named apart from their topics

analytical modeling · 0.0
YearPublicationVenuePosition
1995 Backpropagation in linear arrays-a performance analysis and optimization
abstract
Neural networks are valuable tools for the support of a wide range of image processing applications. For video-rate operation, special-purpose parallel hardware is often necessary. One of the most common architectures used for this purpose is the linear systolic array. The design and implementation of multi-layer neural networks in linear systolic arrays can be complex, however. This paper demonstrates that the smallest network is not necessarily the best in terms of learning or recall times. Furthermore, this paper shows that the manner in which networks are mapped into a particular hardware structure affects both the performance of the application and the efficiency with which the hardware resources are used. We analyze and identify how to best structure neural networks to optimize network performance for throughput, latency and the efficiency with which the hardware is used. We use the HANNIBAL neural network processor as a research vehicle for these investigations and demonstrate the value of the proposed techniques by a number of example applications.
David C. J. Naylor, Simon Jones 0001, David Myers
IEEE Trans. Neural Networks1
1994 A Performance Model for Multilayer Neural Networks in Linear Arrays
abstract
An analytical model is presented for assessing the performance of multilayer neural networks implemented in linear arrays. Metrics to assess latency, throughput rate, and computational and input-output bandwidth are developed. These metrics demonstrate a rich and complex interaction between the performance of the hardware and the number and relative dimensions of the layers in a network. Practical illustration of the use of these metrics is demonstrated for a two-hidden-layer network.>
David C. J. Naylor, Simon Jones 0001
IEEE Trans. Parallel Distributed Syst.1
1993 Neural Network Feature Detector For Real-Time Video Signal Processing
abstract
The application of artificial neural networks to real-time image processing tasks requires the use of dedicated, high performance hardware. A linear array processor called HANNIBAL has been developed which implements the backpropagation neural learning algorithm on-chip. This paper considers the design of a complete neural system which integrates HANNIBAL into an existing image processing environment. The goals for the design of the system have been set partly by the primary application, namely feature recognition, but mainly by the desire for a flexible, high performance hardware tool for the study and evaluation of range of neural image processing applications.
David C. J. Naylor, Simon Jones 0001, David Myers, John Vincent
Int. J. Neural Syst.1