Timothy B. Costa

dblp:205/4272 · DBLP profile ↗
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4ranked-venue papers
0as first author
2since 2021 · last 2023
—ORCID · none

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Systems, architecture and hardware · 2 · 1 since 2021Theory of computation · 2 · 1 since 2021
YearPublicationVenuePosition
2023 CUDA Quantum: The Platform for Integrated Quantum-Classical Computing
abstract
A critical challenge to making quantum computers work in practice is effectively combining them with classical computing resources. From the classical side of hybrid algorithms and integrated application workflows to decoding syndromes for quantum error correction, tightly coupled high performance classical computing will be important for many of the functions required to realize useful quantum computing. A key tool for enabling research and application development is a programming model and software toolchain which allow researchers to straightforwardly co-program classical and quantum computers and leverage the best tools available for each. NVIDIA CUDA Quantum is a single-source programming model in C++ and Python for heterogeneous quantum-classical computing. The CUDA Quantum platform provides several advantages and new capabilities that enable users to get more out of quantum processors. Here, we present CUDA Quantum and demonstrate several use cases including Variational Quantum Eigensolver (VQE) where it provides a significant (287x) performance and capability benefit over existing quantum programming.
Alex McCaskey, Bettina Heim, Manish Modani, Sam Stanwyck, Timothy B. Costa
DAC6
2021 A Set of Batched Basic Linear Algebra Subprograms and LAPACK Routines
abstract
This article describes a standard API for a set of Batched Basic Linear Algebra Subprograms (Batched BLAS or BBLAS). The focus is on many independent BLAS operations on small matrices that are grouped together and processed by a single routine, called a Batched BLAS routine. The matrices are grouped together in uniformly sized groups, with just one group if all the matrices are of equal size. The aim is to provide more efficient, but portable, implementations of algorithms on high-performance many-core platforms. These include multicore and many-core CPU processors, GPUs and coprocessors, and other hardware accelerators with floating-point compute facility. As well as the standard types of single and double precision, we also include half and quadruple precision in the standard. In particular, half precision is used in many very large scale applications, such as those associated with machine learning.
Ahmad Abdelfattah, Timothy B. Costa, Jack J. Dongarra, Mark Gates, Azzam Haidar, Sven Hammarling, Nicholas J. Higham, Jakub Kurzak, Piotr Luszczek, Stanimire Tomov, Mawussi Zounon
ACM Trans. Math. Softw.2
2017 Optimizing Matrix Multiplication on Intel® Xeon Phi TH x200 Architecture
abstract
Matrix multiplication is ubiquitous in scientific computing. From computational science to machine learning, a large and diverse set of applications rely on the performance of general matrix-matrix multiplication (GEMM) subroutines. The Intel®Math Kernel Library(R) provides highly optimized GEMM subroutines that take full advantage of the available parallelism and vectorization in both Intel®Xeon®and Intel®Xeon Phi(TM) processors. In this paper we discuss the optimization of GEMM subroutines for the Intel®Xeon PhiTMx200 (code-named Knights Landing).
Murat Efe Guney, Kazushige Goto, Timothy B. Costa, Sarah Knepper, Louise Huot, Arthur Mitrano, Shane Story
ARITH3
2017 Designing vector-friendly compact BLAS and LAPACK kernels
abstract
Many applications, such as PDE based simulations and machine learning, apply blas/lapack routines to large groups of small matrices. While existing batched blas APIs provide meaningful speedup for this problem type, a non-canonical data layout enabling cross-matrix vectorization may provide further significant speedup. In this paper, we propose a new compact data layout that interleaves matrices in blocks according to the SIMD vector length. We combine this compact data layout with a new interface to blas/lapack routines that can be used within a hierarchical parallel application. Our layout provides up to 14X, 45X, and 27X speedup against OpenMP loops around optimized dgemm, dtrsm and dgetrf kernels, respectively, on the Intel Knights Landing architecture. We discuss the compact batched blas/lapack implementations in two libraries, KokkosKernels and Intel® Math Kernel Library. We demonstrate the APIs in a line solver for coupled PDEs. Finally, we present detailed performance analysis of our kernels.
Kyungjoo Kim, Timothy B. Costa, Mehmet Deveci, Andrew M. Bradley, Simon D. Hammond, Murat Efe Guney, Sarah Knepper, Shane Story, Sivasankaran Rajamanickam
SC2