Outdoor air monitoring on possible air pollution is always one of the important tasks in managing our living environment. A module of five gas sensors and a new learning model is developed by this study to provide precision, real-time multiple gas concentrations in public spaces. The module suits well an internet of things (IoT) node of smart gas-sensing that integrates a custom-designed sensor array, driving circuits, and wireless transmission via Bluetooth/Wi-Fi. The sensed gas data are uploaded to a cloud platform for remote storage and then retrieved by an edge device for on-site processing. A cascaded Multi-Layer Perceptron (MLP) and Long Short-Term Memory (LSTM) model, deployed at edge using TensorFlow Lite for Microcontrollers, compensates successfully for sensor cross-sensitivity, temperature-humidity variations, and other environmental interferences, leading to precise multi-to-multi gas concentration estimation. This edge AI deployment reduces cloud computation load and makes possible an inference in resource-constrained environments. Experimental validation demonstrates that the proposed MLP–LSTM approach achieves accuracies with mean absolute errors within 113 ppb, 0.108 ppm, 0.110 ppm, 0.124 ppm and 0.13 ppb for NOₓ, H₂S, TVOC, CO and SO₂, respectively, superior to those by traditional analysis methods. The system architecture also shows great capability for future integration into IoT applications and an alert system for environmental air monitoring.

A new mixed-signal circuit chip is presented to detect clock glitches, one of fault injection attacks (FIAs), on cryptographic chips, particularly those deployed in Internet of Things (IoT) devices. In fact, IoT devices in communication often operate under strict cost, power, area constraints and physically accessible environments, making it critical of hardware security and protection against fault injection attacks. The key success of the proposed detection lies in a custom-designed delay chain being automatically tuned to approach the remaining operable clock period in the presence of glitches. Successful detection of clock glitches can then be ensured by monitoring continuously whether the clock cycle is shorter than the thresholds defined by the delay chain. The main contribution of this work is the automatic tuning of the delay chain length in an on-line, on-chip fashion to detect glitches even with varied process, voltage, and temperature (PVT) conditions. The on-line adaptivity is made possible by integrating a digital control unit that governs adaptivity and the delay chain, implemented as a mixed-signal circuit capable of effectively detecting malicious clock glitches. The proposed protection circuit was fabricated using the TSMC 180-nm process with an Advanced Encryption Standard (AES) crypto engine serving as a test case to validate the detection capability. Experimental results demonstrate a 100% success rate in detecting glitches at operating frequencies up to 33.3 MHz, with a minimum detectable clock shortening (MDCS) of 0.9 nano-second (ns) caused by clock glitches, showing a state-of-the-art performance as compared to previously reported works.

A hardware accelerator at edge for estimating blood flow volume (BFV) based on photoplethysmography (PPG) from an IoT sensor is successfully designed with on-chip learning for personalization. The success of estimating BFV via PPG helps greatly hemodialysis patients to monitor constantly and ubiquitously the quality of their arteriovenous fistulas or grafts. This accelerator with a BFV estimating algorithm implemented at edge enables faster fine-tuning computation toward favorable accuracy and secure operation without personal biological PPG data transmitted over the fly. The accelerator was built to a chip with a neural network (NN) designed via field programmable gate array (FPGA), consisting mainly of a forward unit for estimating BFV and a backward propagation by an inferencing model. The inferencing is built upon the data collected off-line, and then updated via transfer learning at edge based on additional personal data, i.e., toward personalization of the inference model. In the NN, PPG signal is first filtered through a band-pass filter to remove the noise, while power spectrum density (PSD) and direct current (DC) components are extracted as features to predict BFV. The method of cross-domain clock (CDC) with different clock operations in forward and backward propagations is employed in the accelerator to increase computing efficiency. The results show a significant accuracy increase in predicting BFV from 0.932 by the pretrained model to 0.985 by the personalized model executed in the developed accelerator chip at edge, and superior to all others reported in prior arts.

Blood pressure (BP) is predicted by this effort based on photoplethysmography (PPG) data to provide effective pre-warning of possible preeclampsia of pregnant women. Towards frequent BP measurement, a PPG sensor device is utilized in this study as a solution to offer continuous, cuffless blood pressure monitoring frequently for pregnant women. PPG data were collected using a flexible sensor patch from the wrist arteries of 194 subjects, which included 154 normal individuals and 40 pregnant women. Deep-learning models in 3 stages were built and trained to predict BP. The first stage involves developing a baseline deep-learning BP model using a dataset from common subjects. In the 2ndstage, this model was fine-tuned with data from pregnant women, using a 1-Dimensional Convolutional Neural Network (1D-CNN) with Convolutional Block Attention Module (CBAMs), followed by bi-directional Gated Recurrent Units (GRUs) layers and attention layers. The fine-tuned model results in a mean error (ME) of -1.40 ± 7.15 (standard deviation, SD) for systolic blood pressure (SBP) and -0.44 (ME) ± 5.06 (SD) for diastolic blood pressure (DBP). At the final stage is the personalization for individual pregnant women using transfer learning again, enhancing further the model accuracy to -0.17 (ME) ± 1.45 (SD) for SBP and 0.27 (ME) ± 0.64 (SD) for DBP showing a promising solution for continuous, non-invasive BP monitoring in precision by the proposed 3-stage of modeling, fine-tuning and personalization.

A new datapath for Advanced Encryption Standard (AES) is proposed in this work, which is successfully optimized with a high efficiency of throughout to area for lightweight applications in Internet of Things (IoT) devices. The proposed AES architecture enables parallel encryption of 32-bit blocks for efficient processing of 128-bit data while minimizing hardware area. Optimization is achieved by utilizing shift registers instead of conventional registers in the ShiftRows, MixColumns, and key expansion stages of the 32-bit AES operation. Our implementation, based on the TSMC 40 nm process, achieves a throughput of 692.65 Mb/s, with a gate count of 5.65K and a figure of merit (FOM) of 122.59 Mbps/k-gate, better than all the previous works in terms of efficiency. Furthermore, our proposed 32-bit datapath ensures security against correlation power analysis attacks owing to designed simultaneously active encryption and decryption, as the 32-bit key out of 128 bits remains unrevealed even with 100,000 traces for attack.

A high-accuracy biometric identification system based on photoplethysmography (PPG) is proposed in this study. Equipped with continuous quality assessment on PPG in real-time by calculated power spectral density (PSD) and large-area organic photodetectors (OPDs) in the PPG sensor offering low-noise PPG, the deep learning model built herein is able to acquire delicate PPG features varying clearly from subject to subject, and then achieves high accuracy for biometric applications. It is known that PPG is a technology capable of measuring blood volume changes by emitting optical power into skin, reaching blood vessels and collects the reflected optical power back and out of skin, suitable for ensuring live body biometrics while many other biometrics are unable to. The raw PPG measured by the PPG device is first preprocessed by a bandpass filter, and then those with low PSD of PPG versus noise or large direct current drifts are screened out in real time to ensure the signal quality of PPG prior to biometrics. This preprocessing step is crucial to disregard all the unqualified PPG that may lead to wrongful result of biometrics later. The biometrics is next conducted by a built deep-learning (DL) model of a convolutional neural network (CNN) and long short-term memory (LSTM) layers. The DL model is trained by the PPG data collected from 42 subjects. Experimental results show an accuracy of 99.64% for binary while 98.8% for multiclass classification, outperforming other related works using PPG.

This study proposes a new adaptive template attack scheme for extracting secret keys in Montgomery-ladder-based elliptic curve cryptography (ECC) by effectively exploiting the leakage difference between key bits 1 and 0. To determine the key length and number of computation cycles per bit of the ECC to be attacked, the proposed adaptive attack employs an adaptive leakage-windowing technique and correlation analysis on the power trace obtained from an ECC module with a secret key. The point of interest (POI) is identified at the bit with the maximum difference in leakage between key bits 1 and 0 using the leakage window per bit. The trace from the victim ECC hardware with secret key is compared to those collected in prior templates with key bits 1 and 0 to recover the key. To validate the performance, a Xilinx Artix-7 FPGA chip was used to implement an Edward-curve digital signature algorithm (EdDSA) with Ed25519 and SHA-512 accelerators. The experimental results show a favorable key recovery rate of 100%. Further attack results are presented for the ECC modules with advanced countermeasures against side-channel attack, such as projective coordinate and/or scalar randomization It is validated that the proposed adaptive attack is able to exploit successfully 100% the keys of Montgomery-ladder-based ECC accelerators without and with countermeasures of projective coordinate or scalar randomization. Only a heavily resource-consumed ECC module with implemented projective coordinate, scalar randomization and a cryptographic secure random number generator is capable of defending the proposed attack.

A new neural network (NN) model is established for compensating effectively in real time the luminance degradation of organic light emitting diodes (OLEDs) in a display operated for an extensive period. The compensation is achieved by three stages of models. First, a model was orchestrated to estimate well the temperature distribution of an OLED display. Second, a new, incremental NN was established based on collected data of degraded OLED luminance with ambient temperature recorded. Third, another algorithm in logic based on interpolation is designed to compensate effectively the degraded OLED luminance in real-time operation of the OLED displays in the shortest time possible. All the above-mentioned 3 algorithms are implemented into hardware via the technology of field programmable gate array (FPGA), with the platform of Xilinx Vivado 2020.1 for realizing the associated codes in Verilog. Based on experimental data, the compensation logics in the FPGA board led to the averaged displaying accuracies of 97.1%, 93.9%, and 95.1% for red, green, and blue OLEDs, respectively, with respect to target luminances over a long period of 1000 h, showing the best performance over all the other works reported in the past. The presented excellent performance attributes are mainly due to the consideration of temperature as one of the inputs to the built degradation NN model and the incremental nature of the model.

This study proposed a Photoplethysmography (PPG) readout system to estimate the reflective pulse transit time (RPTT) in analog domain for the blood pressure measurement. The proposed photodetector readout consists of a sensing circuit, an amplification circuit, and peak-sensing circuits. The designed circuit is fabricated by TSMC$0.18\mu \mathrm{m}$1P6M 1.8V mixed-signal CMOS process. The measurement results show that the design chip consume$50\mu \mathrm{W}$and the measured dynamic range is 100 dB. Experimental verification shows that the obtained RPTT from the designed chip is 99.9% correlated with the RPTT obtained after the pre-signal processing of the PPG signal and the measured average difference in RPTT measurement is 15.73 msec. The obtained performance in terms of SBP and DBP shows that the accuracy satisfies the requirement of the AAMI under$\pm 8$mmHg.

This paper presents, a DC drift compensated (due to motion2via the TSMC 180nm process. The experiment result shows that the designed readout can sense linearly from 1nA to maximum 40μ current, with a resultant dynamic range of 90dB and the measured input-referred noise is 0.256 nA/ V Hz. The total measured power consumption of the readout circuit is 460μW, while the power consumption of the on-chip OLED driver is 1.8 mW. The obtained PPG signals from the wrist are subsequently processed with quality checking, and feature extraction. The measured accuracy and standard error for the heart rate estimation are 96%, and -0.12±5 beats/minute, respectively.

The backpack energy harvester not only harvests energy to charge portable device but also reduces the risk of orthopaedic and muscular injury. In this paper, a lossless current sensing approach for backpack energy harvester is present in swop fly-back converter. The swop fly-back converter is reconstructed by the input capacitor and transformer in fly-back converter. It is controlled with constant on time algorithm and is switching in boundary mode strategy. The measured digital data is transmitted to smart phone by Bluetooth. And then, as a portable base station, the smartphone sent to the cloud. In the previous test, the linearity between time to digital converter output and output current is good as the reason that the correlation coefficients is 0.9772. The average output current is 0.1686 A for striding and 0.4242 A for jogging. The maximum output current is 0.9972 A for striding and 2.16 A for jogging.

Vibration and displacement sensors need to be compact for many applications in automation or consumer electronics, and microelectromechanical structures are a convenient way to implement such sensors. For these MEMS devices, optical readout methods have proven to be superior to capacitive or piezoresistive strategies in terms of sensitivity as well as noise and interference immunity, however the integration of light sources and detectors is not easily possible. This paper presents an approach to use organic optoelectronic devices for the readout. OLED and OPD (organic photo detector) are structured on the glass substrate and cover encapsulating the MEMS devices, allowing for a tightly integrated sensor based on vertical light flux modulation by a horizontally moving proof mass. The paper describes the principle sensor structure as well as the fabrication of suitable organic devices. First test results show that the approach is feasible.

A constant on-time (COT) single-inductor bipolar multiple-output (SIBMO) on-chip boost converter is proposed for LCD drivers in this study. The converter is designed for biasing some analog and digital circuits fabricated on glass substrates for benefits of extending the life of LCD. These circuits on glass require bipolar high voltages for drive LCDs. The converter boosts the input of 2.8V to two positive outputs and two negative outputs, +12V, +6V, -12V and -6V, respectively. Different from the commonly-used pulse width modulation (PWM), the constant on-time (COT) is adopted herein by a dynamic charging algorithm whose frequency is adapted to the varied output voltage level, thus enjoying the merit of less circuit complexity and a smaller chip area. The COT is in this study further developed to a ripple-based one for achieving applicability even with unbalanced output loads with high efficiency. While total maximum output power is 260mw and the switching frequency varies from 500 kHz to 650 kHz, the maximum efficiency reaches 82.4%. The converter is fabricated by TSMC 0.25μm 1P3M high voltage CMOS technology for verification.