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Ganesh Venkitachalam

dblp:21/2638 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 2001
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Cloud and datacenter computing · 90% Processor architecture and microarchitecture · 10%
Software engineering, system software, and programming languages
2 papers
Operating systems · 100%

Topics — the 3 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Operating systems › virtualization
hypervisor
0.012001
Virtualizing I/O Devices on VMware Workstation's Hosted Virtual Machine Monitor · USENIX ATC, General Track 2001
Cloud and datacenter computing › virtualization
i/o virtualization
0.012001
Virtualizing I/O Devices on VMware Workstation's Hosted Virtual Machine Monitor · USENIX ATC, General Track 2001
Cloud and datacenter computing
virtualization
0.012001
Virtualizing I/O Devices on VMware Workstation's Hosted Virtual Machine Monitor · USENIX ATC, General Track 2001

Methods — techniques the papers use, named apart from their topics

segmentation and paging hardware · 0.0
YearPublicationVenuePosition
2001 Virtualizing I/O Devices on VMware Workstation's Hosted Virtual Machine Monitor
Jeremy Sugerman, Ganesh Venkitachalam, Beng-Hong Lim
USENIX ATC, General Track2
1999 Integrating segmentation and paging protection for safe, efficient and transparent software extensions
abstract
The trend towards extensible software architectures and component-based software development demands safe, efficient, and easy-to-use extension mechanisms to enforce protection boundaries among software modules residing in the same address space. This paper describes the design, implementation, and evaluation of a novel intra-address space protection mechanism called Palladium, which exploits the segmentation and paging hardware in the Intel X86 architecture and efficiently supports safe kernel-level and user-level extensions in a way that is largely transparent to programmers and existing programming tools. Based on the considerations on ease of extension programming and systems implementation complexity, Palladium uses different approaches to support user-level and kernel-level extension mechanisms. To demonstrate the effectiveness of the Palladium architecture, we built a Web server that exploits the user-level extension mechanism to invoke CGI scripts as local function calls in a safe way, and we constructed a compiled network packet filter that exploits the kernel-level extension mechanism to run packet-filtering binaries safely inside the kernel at native speed. The current Palladium prototype implementation demonstrates that a protected procedure call and return costs 142 CPU cycles on a Pentium 200MHz machine running Linux.
Tzi-cker Chiueh, Ganesh Venkitachalam, Prashant Pradhan
SOSP2