The paper presents a comprehensive theoretical analysis of dual-input digital Doherty power amplifiers (DPAs) and outlines a specific design methodology. The theory explains how adaptive input signals affect the linearity and efficiency of the amplifiers, as well as the necessary adjustments to the operating point of the peaking amplifier. Using the analytical model, the paper offers guidance on adjusting the input signal to achieve the highest efficiency, ensuring that the carrier amplifier remains in saturation mode within the load-modulated region. It also discusses the maximum theoretically achievable efficiency for digital DPAs, which serves as a benchmark for comparing results with other amplifier topologies. Additionally, the paper proposes a practical approach for implementing the adaptive input algorithm during the measurement of modulated test signals. This method combines the measured response of the DPA with the theoretically derived optimal input signal splitting pattern, creating test signals for both the carrier and peaking input paths of the DPA. This effectively addresses unseen sources of nonlinearity by the theoretical model within the input signal bandwidth. Validation experiments were conducted on a 50W dual-input DPA designed for 5G wireless communication at 3.5 GHz, utilizing a 90 MHz modulated signal.

Power amplifier (PA) models, such as the neural network (NN) models and the multilayer NN models, have problems with high complexity. In this article, we first propose a novel behavior model for wideband PAs, using a real-valued time-delay convolutional NN (RVTDCNN). The input data of the model is sorted and arranged as a graph composed of the in-phase and quadrature ( I/Q ) components and envelope-dependent terms of current and past signals. Then, we created a predesigned filter using the convolutional layer to extract the basis functions required for the PA forward or reverse modeling. Finally, the generated rich basis functions are input into a simple, fully connected layer to build the model. Due to the weight sharing characteristics of the convolutional model's structure, the strong memory effect does not lead to a significant increase in the complexity of the model. Meanwhile, the extraction effect of the predesigned filter also reduces the training complexity of the model. The experimental results show that the performance of the RVTDCNN model is almost the same as the NN models and the multilayer NN models. Meanwhile, compared with the abovementioned models, the coefficient number and computational complexity of the RVTDCNN model are significantly reduced. This advantage is noticeable when the memory effects of the PA are increased by using wider signal bandwidths.

In this paper, a low-feedback-sampling-rate digital predistortion (DPD) method is proposed for wideband wireless transmitters and radio-frequency power amplifiers (PAs). This DPD method inserts a non-ideal real band-pass filter into the feedback loop to limit the feedback bandwidth. Meanwhile, to recover the band-limited feedback signal, it introduces a signal-recovery module that is based on the deep neural network (DNN). A data-preprocessing technique is proposed to reduce the amount of input data for the DNN and thereby significantly reducing its structural complexity. Also, the use of DNN makes it feasible to implement off-line training. Both the simplicity of the proposed DNN and the availability of off-line training reduce the system complexity in DPD. Experimental validation was performed on a PA driven by wideband orthogonal-frequency-division-multiplexing (OFDM) signals. The results demonstrated the superiority of the proposed method in under-sampling applications. The proposed DPD method achieved the same linearization performance as the state-of-art DPD methods while requiring a sampling rate that was approximately 5% less. Meanwhile, the proposed DPD method has been validated to have stronger anti-noise and generalization capabilities.

A digital predistorter, modeled by an augmented real-valued time-delay neural network (ARVTDNN), has been proposed and found suitable to mitigate the nonlinear distortions of the power amplifier (PA) along with modulator imperfections for a wideband direct-conversion transmitter. The input signal of the proposed ARVTDNN consists of Cartesian in-phase and quadrature phase ( I/Q ) components, as well as envelope-dependent terms. Theoretical analysis shows that the proposed model is able to produce a richer basis function containing both the desired odd- and even-order terms, resulting in improved modeling capability and distortion mitigation. Its actual performance has been validated through extensive simulations and experiments. The results show that the compensation and hardware impairment mitigation capabilities of the ARVTDNN are superior to the existing state-of-the-art real-valued focused time-delay neural network (RVFTDNN) by 3-4 dB for the adjacent channel power ratio and by 2-3 dB in terms of the normalized mean square error. Other important features of the proposed model are its reduced complexity, in terms of the number of parameters and floating-point operations, and its improved numerical stability compared to the RVFTDNN model.

In this paper, an augmented crossover memory polynomial model (A-COMPM) is proposed and developed which can be used for characterizing and linearizing multiple-input multiple-output (MIMO) transmitters in the presence of linear and nonlinear crosstalk. The proposed model significantly improves the performance of the crossover memory polynomial model (CO-MPM) by more accurately incorporating the effect of crosstalk. The proposed model performs comparably to the 2 x 2 parallel Hammerstein (2 x 2 PH) model, while requiring the same number of coefficients as CO-MPM and a lower number of coefficients than the 2 x 2 PH. The model was tested for forward modeling and digital predistortion (DPD) applications in the presence of both linear and nonlinear crosstalk. Experimental results show that the model outperforms the CO-MPM and 2 x 2 PH DPDs, at a lower number of coefficients compared to both models. Furthermore, the issue of numerical stability of the DPD

This paper proposes a new peak-to-average power ratio (PAPR) reduction technique using a polynomial soft clipping function identified through a nonlinear constrained optimization. The power efficiency optimization problem of a linearized power amplifier can be considered as the minimization of the PAPR constrained by meeting the spectral mask requirements of the signal standard. It is demonstrated that the proposed approach can reduce the PAPR from 9.9 to 5.5 dB while meeting the spectral mask of the wideband code-division multiple-access standard. To compare the results with the traditional clipping and filtering method, the 5.5-dB PAPR clipped signal using the clipping and filtering technique was compared with the soft clipped signal. With the same efficiency, the error vector magnitude (EVM) for the soft clipped signal improved from 4.5% to 1.3% using post-compensation. Later, clipping and filtering are combined with the soft clipping technique. It is shown that the combined structure can reduce the PAPR to 3.4 dB while passing the adjacent channel power ratio and EVM requirements. The performance of the proposed method in the presence of additive white Gaussian noise and fading channels has been evaluated for 64QAM modulations using orthogonal frequency-division multiplexing modulated symbols.

Narrow band interference NBI deteriorates the quality of the spectrum, leading to a poorer performance of modern universal mobile telecommunication system UMTS spread spectrum systems. The linear prediction algorithm is one of the most significant techniques to overcome NBI and enhance the performance of UMTS systems. In this paper, a modified linear prediction algorithm is proposed for NBI suppression in a conditionally stationary environment. This modification improves the error energy estimation in the auto-regression model of the linear prediction. The convergence of the proposed algorithm is evaluated, and its robustness is verified using Kullback-Leibler metrics for conditionally stationary NBI signals. Computer simulations are carried out, and the obtained results demonstrate the performance of the proposed algorithm and its compliance with UMTS protocols. Copyright © 2012 John Wiley & Sons, Ltd.

The oversampling requirement in a delta-sigma modulator (DSM) is considered one of the limiting factors toward its employment in current high-frequency applications, such as wireless software defined radio (SDR) systems. This paper advances that the critical requirement for DSMs is high-frequency processing and not a high-oversampling ratio. A single-bit semiparallel processing structure to accomplish the high-frequency processing is proposed in this paper. Using the suggested low-oversampling digital DSM architecture, high-speed, high-complexity computations, which are normally required for wireless applications, are executed simultaneously. This facilitates the design of embedded SDR multistandard transmitters using commercially available digital processors. The most favorable application of the proposed single-bit DSM is to build an radio frequency transmitter that includes a one-bit quantifier with two-level switching power amplifier for both high linearity and high efficiency. Performance analysis is carried out by using MATLAB simulations, which shows a reduction of the oversampling ratio by a factor of 16 (for a baseline oversampling ratio of 256) with the same signal-to-noise ratio (SNR). The proposed DSM is also implemented on a field-programmable gate array (FPGA) board and its performance is validated by using a code division multiple access signal. The bandwidth of the output signal is increased four times without increasing the processing frequency. Simultaneously, quality of the output signal remains the same but FPGA resource usage is increased by a factor of three.

This paper demonstrates a new channel-selective multi-cell processing predistortion technique that compensates for the nonlinearities of multi-carrier transmitters. The proposed technique uses independent processing cells to compensate for the intra-band and inter-band distortions of nonlinear transmitters. This frequency-selective feature of the proposed technique significantly reduces the minimum sampling rate requirements of analog-to-digital and digital-to-analog converters, which are a critical issue for conventional digital predistortion (DPD) techniques dealing with wideband signals. The proposed technique was evaluated with four-carrier (1001) and six-carrier (100001) WCDMA signals, using a nonlinear 10-Watt power amplifier. The performance of the proposed technique was compared with look-up table, multi-branch and recently proposed frequency-selective DPDs, in terms of adjacent-channel power ratios (ACPRs) and sampling rate requirements. The proposed technique improved the ACPR and the carrier-to-intermodulation power ratio (CIMPR) of the 1001 WCDMA signal by more than 13 dB and 10 dB, respectively.

This paper presents an overview of system-level solutions for green wireless communication infrastructure. It illustrates that a combination of high efficiency amplification system with a linearity restoration technique is unavoidable. Currently, Doherty power amplifiers along with digital predistortion technique are able to achieve high power efficiency. However, due to the limited bandwidth of digital predistortion systems (typically 20 MHz), feedforward based linearizers which result in significantly lower power efficiency are still considered for wideband solutions (up to 60 MHz). An experimental approach for extending the bandwidth of digital predistortion systems is reported. This setup is then applied for the linearization, using digital predistortion, of a Doherty power amplifier driven by an 8-carrier WCDMA signal having a total bandwidth of 40 MHz.