Modular design is critical in reducing hardware designer’s cognitive load and development cost. However, it is challenging to modularize high-performance pipelined circuits with structural, data, and control hazards because their resolution—stalling, and bypassing, and discard-and-restarting—introduce cross-stage dependencies. The dependencies could potentially mandate monolithic control logic and create combinational loops, hindering modular design. An effective method to modularize pipelined circuits is valid-ready interfaces, but they apply to a relatively simple form of pipelined circuits only with structural hazards. We propose hazard interfaces, a generalization of valid-ready interfaces that can modularize pipelined circuits not only with structural but also with data and control hazards. The key idea is enveloping the cross-stage dependencies within interfaces. We also design combinators for hazard interfaces in the style of map-reduce that facilitate decomposition of control logic. We implement a compiler (to synthesizable Verilog) for a prototype language supporting hazard interfaces and combinators, and design a sound and efficient type checker that proves the absence of combinational loops. With case studies on 5-stage RISC-V CPU core and 100 Gbps Ethernet NIC, we demonstrate that hazard interfaces indeed facilitate modular design while incurring no noticeable cost in performance, power, and area over reference designs in Chisel and Verilog. CCS Concepts: • Hardware → Hardware description languages and compilation ; • Software and its engineering → Functional languages .

Abstract Orthogonal frequency division multiplexing (OFDM) technology has been increasingly applied to power line carrier communication (PLC). Discrete Fourier Transformation (DFT)‐based channel estimation algorithm is suitable for OFDM‐based PLC due to its low complexity. In view of the problem that the traditional DFT channel estimation does not consider the influence of noise inside cyclic prefix (CP), an improved DFT channel estimation based on signal‐to‐noise ratio (SNR) estimation is proposed. First, least‐square (LS) algorithm is performed and the frequency domain channel estimation is converted to the time domain through inverse DFT, and the average SNR of the system is estimated according to the pilot sequence. Second, the substitute SNR for each sample point inside CP is defined and used to filter impulse noise inside CP. Third, the average SNR is converted into the threshold of the useful signal energy inside CP, and the widespread background noise inside CP is filtered. The simulation results show that the proposed algorithm can obtain more accurate channel estimation than other DFT channel estimation algorithms because it can effectively filter out noise inside CP. In addition, compared with other similar algorithms, the proposed algorithm dose not result in a significant increase in complexity.

This article presents a simple yet powerful online flotation process working condition (FPWC) discrimination approach based on the sparse representation of froth images. It learns a local Gabor pattern-based discriminative dictionary with a linear classification model simultaneously for the FPWC identification by solving a sparsity-constrained optimization problem. The proposed method tends to achieve similar and distinct sparse codes of froth images for the same and different FPWCs, respectively, facilitating the accurate FPWC identification. To ensure the adaptability of the FPWC discrimination model, an incremental learning-based online model updating procedure is further derived to monitor the dynamically changing characteristics of FPWCs based on an introduced sparsity discrimination index. The proposed method was validated on an industrial preferential lead-flotation subcircuit process. The prototype monitoring system with extensive confirmatory and comparative experiments shows the effectiveness and superiority of the proposed method, which lays a foundation for the optimal control of industrial flotation processes.

In this article, an improved finite-control-set model predictive flux control (FCS-MPFC) is developed and implemented to eliminate the circulating current in the semicontrolled open-winding permanent magnet synchronous generator supplied by a single dc power. First, the references of torque, flux, and zero-sequence current are combined into the stator flux vector reference along with the implementation of maximum torque per ampere control to eliminate the weighting factors of the cost function in the conventional finite-control-set model predictive torque control. Then, to further improve the steady-state performance, a developed double-vector method based on the uncontrollable side voltage vector adjustment is conducted, which has the advantage of low computation burden. Moreover, a modified duty cycle control strategy is presented, in a manner where the reference value of flux is superseded with the measurement one to effectively calculate the duration of the optimal vector. Finally, experimental results verify the effectiveness and superiority of the proposed FCS-MPFC scheme.