Demo Data from VLDB 2026 / reviewers in the wild / expert
Liuwei Fu
dblp:214/3425
· DBLP profile ↗
2ranked-venue papers
0as first author
1since 2021 · last 2025
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021Databases, data management, data science and information retrieval · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 67% Processor architecture and microarchitecture · 33% | |
| Artificial intelligence
1 paper |
Graph learning · 100% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
cache |
0.9 | 1 | 2025 | TRACED: A Temporal Graph Neural Networks-based Model for Data Prefetching · ACM Trans. Archit. Code Optim. 2025 |
Memory systems › cache › prefetching
data prefetching |
0.9 | 1 | 2025 | TRACED: A Temporal Graph Neural Networks-based Model for Data Prefetching · ACM Trans. Archit. Code Optim. 2025 |
Machine learning › Graph learning › graph neural network
dynamic graph neural network |
0.3 | 1 | 2025 | TRACED: A Temporal Graph Neural Networks-based Model for Data Prefetching · ACM Trans. Archit. Code Optim. 2025 |
Methods — techniques the papers use, named apart from their topics
temporal graph neural network · 1.7dynamic clustering · 1.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | TRACED: A Temporal Graph Neural Networks-based Model for Data PrefetchingabstractIn modern microarchitectures, machine-learning-based prefetchers use past memory requests to learn access patterns and predict memory addresses, thereby prefetching data into the cache to mitigate the processor-memory speed gap. However, they face two key challenges in capturing irregular access patterns generated by complex data structures and algorithms. One is data dispersion: the disorderliness of memory addresses makes it difficult for prefetchers to extract meaningful data features. The other is temporal and spatial complexity: existing prefetchers fail to effectively learn temporal and spatial characteristics, and thus are unable to explore more complex access patterns. To resolve these challenges, we propose TRACED, a novel temporal graph neural network-based prefetcher aimed at learning access patterns of memory addresses. TRACED consists of two key components: a dynamic clustering component and a temporal graph neural network component. In the dynamic clustering component, we introduce a similarity function to quantify the similarity of memory addresses. Based on the quantified similarity, we dynamically group unordered memory addresses into different clusters. This ensures that the memory addresses in each cluster are ordered and change smoothly, thus resolving the first challenge. The temporal graph neural network component constructs a spatiotemporal graph to represent relationships among memory addresses. This helps capture temporal and spatial characteristics both across and within clusters, thus resolving the second challenge. This article demonstrates the effectiveness of the proposed prefetcher through experiments. Specifically, in terms of accuracy, TRACED outperforms BO, SPP, DOMINO, Delta-LSTM, and VOYAGER by 2.29%–40.83% on average. Furthermore, TRACED attains remarkable coverage of 55.67% and IPC of 43.75%, outperforming all competing approaches in both metrics. He Jiang 0001, Liuwei Fu, Dong Liu 0025, Zhilei Ren, Yuting Chen 0001, Lei Qiao 0002 |
ACM Trans. Archit. Code Optim. | 2 |
| 2019 | An adaptation reference-point-based multiobjective evolutionary algorithm
Liuwei Fu, Shengxiang Yang, Jinhua Zheng, Gan Ruan, Tingrui Pei, Lei Wang 0069 |
Inf. Sci. | 2 |