VLDB 2026 Research / reviewers in the wild / expert
Larisa Stoltzfus
dblp:214/4605
· DBLP profile ↗
3ranked-venue papers
2as first author
1since 2021 · last 2021
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 first-author · 1 since 2021Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Programming languages and type systems · 50% Compilers and program optimization · 50% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Parallel and multicore computing · 77% GPUs and heterogeneous computing · 23% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Programming languages and type systems
domain-specific languages |
0.4 | 1 | 2020 | Tiling Optimizations for Stencil Computations Using Rewrite Rules in Lift · ACM Trans. Archit. Code Optim. 2020 |
Compilers and program optimization › loop optimization
stencil computation optimization |
0.4 | 1 | 2020 | Tiling Optimizations for Stencil Computations Using Rewrite Rules in Lift · ACM Trans. Archit. Code Optim. 2020 |
GPUs and heterogeneous computing › GPU computing › GPU algorithms
GPU stencil computation |
0.1 | 1 | 2020 | Tiling Optimizations for Stencil Computations Using Rewrite Rules in Lift · ACM Trans. Archit. Code Optim. 2020 |
Methods — techniques the papers use, named apart from their topics
rewrite rules · 0.9lift primitives · 0.9
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | Code Generation for Room Acoustics Simulations with Complex Boundary ConditionsabstractThe software and hardware landscape of high performance computing is expanding faster than computational scientists can take advantage of new frameworks and platforms. In an ideal world, simulation codes would be written once in a high-level manner and achieve high-performance anywhere, but the reality is more complicated. Currently, high-level solutions lack support for sophisticated physical models across different parallel backends. Existing solutions with appropriate support are low-level and, therefore, tied to a specific hardware target. We present an approach that tackles this problem with a modularized separation of concerns: a middle layer separates the management of generating low-level optimized code from a high-level programmable layer. In this paper, we describe how our contributions to this hardware-agnostic, middle-layer language provide functionality for complex room acoustics simulations, a type of Finite Difference Time Domain (FDTD) simulation using stencils which is representative of many other 3D wave models. We show that we are able to develop performance-portable codes for these types of models which leads to performance on par with tuned hand-written implementations. Furthermore, we show how this approach is used to develop both host and device side code for multi-kernel applications, as is required for room acoustics simulations with complex boundaries. Larisa Stoltzfus, Brian Hamilton, Michel Steuwer, Christophe Dubach |
IPDPS | 1 |
| 2020 | Tiling Optimizations for Stencil Computations Using Rewrite Rules in LiftabstractStencil computations are a widely used type of algorithm, found in applications from physical simulations to machine learning. Stencils are embarrassingly parallel, therefore fit on modern hardware such as Graphic Processing Units perfectly. Although stencil computations have been extensively studied, optimizing them for increasingly diverse hardware remains challenging. Domain-specific Languages (DSLs) have raised the programming abstraction and offer good performance; however, this method places the burden on DSL implementers to write almost full-fledged parallelizing compilers and optimizers. Lift has recently emerged as a promising approach to achieve performance portability by using a small set of reusable parallel primitives that DSL or library writers utilize. L ift ’s key novelty is in its encoding of optimizations as a system of extensible rewrite rules which are used to explore the optimization space. This article demonstrates how complex multi-dimensional stencil code and optimizations are expressed using compositions of simple 1D L ift primitives and rewrite rules. We introduce two optimizations that provide high performance for stencils in particular: classical overlapped tiling for multi-dimensional stencils and 2.5D tiling specifically for 3D stencils. We provide an in-depth analysis on how the tiling optimizations affects stencils of different shapes and sizes across different applications. Our experimental results show that our approach outperforms existing compiler approaches and hand-tuned codes. Larisa Stoltzfus, Bastian Hagedorn, Michel Steuwer, Sergei Gorlatch, Christophe Dubach |
ACM Trans. Archit. Code Optim. | 1 |
| 2018 | High performance stencil code generation with liftabstractStencil computations are widely used from physical simulations to machine-learning. They are embarrassingly parallel and perfectly fit modern hardware such as Graphic Processing Units. Although stencil computations have been extensively studied, optimizing them for increasingly diverse hardware remains challenging. Domain Specific Languages (DSLs) have raised the programming abstraction and offer good performance. However, this places the burden on DSL implementers who have to write almost full-fledged parallelizing compilers and optimizers. Bastian Hagedorn, Larisa Stoltzfus, Michel Steuwer, Sergei Gorlatch, Christophe Dubach |
CGO | 2 |