Demo Data from VLDB 2026 / reviewers in the wild / expert
Boyu Qin
dblp:218/2063
· DBLP profile ↗
4ranked-venue papers
2as first author
1since 2021 · last 2024
0000-0002-2612-7881ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 2 · 2 first-author · 1 since 2021Systems, architecture and hardware · 1Security and privacy · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 62% Integrated circuit design · 38% | |
| Interdisciplinary, comprehensive, and emerging computing
1 paper |
Energy systems and smart grids · 100% | |
| Theoretical computer science
1 paper |
Mathematical optimization · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Energy systems and smart grids › power system planning and operation
power system resilience |
0.4 | 1 | 2020 | Defense Strategy for Resilient Shipboard Power Systems Considering Sequential Attacks · IEEE Trans. Inf. Forensics Secur. 2020 |
Hardware accelerators and domain-specific architectures › signal processing accelerator
FFT accelerator |
0.4 | 1 | 2020 | A Novel Area-Power Efficient Design for Approximated Small-Point FFT Architecture · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Integrated circuit design
ASIC design |
0.1 | 1 | 2020 | A Novel Area-Power Efficient Design for Approximated Small-Point FFT Architecture · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Integrated circuit design
low-power circuit design |
0.1 | 1 | 2020 | A Novel Area-Power Efficient Design for Approximated Small-Point FFT Architecture · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Mathematical optimization › optimization under uncertainty
robust optimization |
0.1 | 1 | 2020 | Defense Strategy for Resilient Shipboard Power Systems Considering Sequential Attacks · IEEE Trans. Inf. Forensics Secur. 2020 |
Methods — techniques the papers use, named apart from their topics
tri-level robust optimization · 0.9nested column-constraint generation · 0.9twiddle factor merging · 0.4magnitude-response aware approximation · 0.4common subexpression sharing · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | Aperiodic Coordination Scheduling of Multiple PPLs in Shipboard Integrated Power SystemsabstractShipboard integrated power systems (SIPSs) are usually equipped with multiple pulsed power loads (PPLs). In complex scenarios with strict operational requirements, the performance of the SIPS is greatly affected by the output energy of PPLs, especially in achieving high suppressive capability in a short period. To maximize the short-time output efficiency of PPLs in emergency situations, the aperiodic scheduling method is studied, aiming at optimizing the coordination of multiple PPLs and energy storage. The proposed aperiodic scheduling model aims to maximize the total utility of PPLs in the given period. The model fully considers constraints related to energy storage, system power balance, aperiodic charging and discharging process, time sequence, and charging power. To solve this complex non-linear model, a bi-layer dynamic programming algorithm is proposed. Simulation tests of SIPS performance are carried out to validate the advantage of the proposed method. The results show that the performance of single PPL and multi PPLs with aperiodic scheduling is improved by 42.3% and 25.7% respectively compared with periodic scheduling. Boyu Qin, Hongzhen Wang, Wei Li 0058, Fan Li 0004, Wei Wang 0478, Tao Ding 0001 |
IEEE Trans. Intell. Transp. Syst. | 1 |
| 2020 | Decomposition-Based Stability Analysis for Isolated Power Systems With Reduced ConservativenessabstractAn isolated power system (IPS) usually operates in an islanded mode. Because of the lack of support from an external power grid, stability is a prominent issue for IPSs. This article proposes a novel stability analysis approach for IPSs based on the input-to-state stability (ISS) theory. Compared with existing stability analyses that use simulations and direct methods, the proposed method decomposes the stability analysis process by considering the ISS properties of subsystems and a network equation that reflects their connections. Thus, it has good adaptability for the stability analysis of systems with flexible operating conditions. Algorithms are presented for estimating the ISS properties of subsystems, and asymptotic gains in a piecewise linear form are adopted. The small gain theorem is used for the decomposed stability analysis, and a practical algorithm to numerically check the small gain condition is presented. Time-domain simulations were performed with a test system to verify the effectiveness of the proposed decomposition-based stability analysis approach.Note to Practitioners—Power systems used in shipboards, airplanes, remote areas, and so on are usually classified as isolated power systems (IPSs). The continuity of power supply in IPSs is the prerequisite of fulfilling certain tasks. Due to the lack of support from the bulk power grid, the normal operation of IPSs can be threatened by various external disturbances, such as disasters, battle damages, device failures, and so on. To maintain the survivability and reliability of IPSs under extreme conditions, fast reconfiguration and emergency control approaches are often performed, which lead to system topology changes and frequent connection/disconnection operation of devices in IPSs. Because of the limited generation capacity of an IPS, a stability analysis after an emergency is important for ensuring that the IPS can perform tasks normally, and can provide guidance for designing fast reconfiguration and emergency control strategies. However, current stability analysis approaches have limited applicability or are overly conservative for analyzing the stability of IPSs. To address the challenge of changeable topologies for the stability analysis of an IPS, this article proposes a decomposition-based analysis approach using input-to-state stability (ISS) theory. By decomposing the entire system into several subsystems, the system’s stability can be checked through the ISS properties of subsystems and their connections. The ISS properties of subsystems can be estimated offline, which saves time for online calculation. To reduce the conservativeness of stability analysis, the asymptotic gains in piecewise linear form are adopted in this article. Practical algorithms are designed for efficiently checking the proposed decomposition-based stability conditions. The research outcome provides a fast and flexible stability analysis approach that can adapt to the frequent changes in the operating conditions of IPSs. Boyu Qin, Jin Ma 0001, Wei Li 0058, Tao Ding 0001, Albert Y. Zomaya |
IEEE Trans Autom. Sci. Eng. | 1 |
| 2020 | A Novel Area-Power Efficient Design for Approximated Small-Point FFT ArchitectureabstractFast Fourier transform (FFT) is an essential algorithm in digital signal processing and advanced mobile communications. With the continuous development of modern technology, the area-power efficient hardware implementation of FFT has attracted a lot of attention. In this article, a novel design for FFT implementation is proposed. The number of resource-expensive multiplications in our design is decreased by a twiddle factor merging technique that reduces the hardware area. Subsequently, a common subexpression sharing scheme is applied to reuse the hardware resources to further save the hardware area. In addition, a magnitude-response aware approximation algorithm is proposed for applications where the transformation accuracy can be compromised a little bit for lesser hardware area and power dissipation. Logic synthesis shows that the proposed 16-point FFT architecture can save hardware area and power dissipation on application-specific integrated circuit (ASIC) by up to 65.7% and 53.1% compared with recently published designs. Similarly, the proposed 32-point FFT architecture achieves up to 58.8% reduction on hardware area and 60.0% reduction on power dissipation on ASIC. Xueyu Han, Jiajia Chen 0002, Boyu Qin, Susanto Rahardja |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |
| 2020 | Defense Strategy for Resilient Shipboard Power Systems Considering Sequential AttacksabstractTo increase the resilience of shipboard power systems, this paper presents an optimal defense strategy to protect critical lines against attacks. In the modeling, an attack is considered to destroy one critical bus, which may result in that all lines are connected to this bus will be out of service unless protection is enabled. Furthermore, after one true attack occurs, the network restoration is performed as soon as possible to pick up the critical loads and maintain system operation. To address the uncertain location of the attacks, a tri-level robust optimal defense strategy is set up to protect the critical lines under the worst attack. Moreover, a nested column-constraint generation method is employed to solve this model. A 60-bus shipboard power system is studied to demonstrate the effectiveness of the proposed model and the defense method. Tao Ding 0001, Xiong Wu 0003, Boyu Qin, Yongheng Yang, Frede Blaabjerg |
IEEE Trans. Inf. Forensics Secur. | 4 |