Demo Data from VLDB 2026 / reviewers in the wild / expert
Euji Tamura
dblp:22/6631
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 1981
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 36% Performance modeling and evaluation · 36% Processor architecture and microarchitecture · 16% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Compilers and program optimization
microprogram optimization |
0.0 | 1 | 1981 | Optimization of Microprograms · IEEE Trans. Computers 1981 |
Electronic design automation › hardware verification and test
hardware verification |
0.0 | 1 | 1978 | A module level simulation technique for systems composed of LSI's and MSI's · DAC 1978 |
Performance modeling and evaluation
simulation |
0.0 | 1 | 1978 | A module level simulation technique for systems composed of LSI's and MSI's · DAC 1978 |
Processor architecture and microarchitecture › microprogramming
microinstruction encoding |
0.0 | 1 | 1981 | Optimization of Microprograms · IEEE Trans. Computers 1981 |
Methods — techniques the papers use, named apart from their topics
global optimization · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1981 | Optimization of MicroprogramsabstractThis paper describes a microprogram optimization technique called MORIF. The technique is general enough to treat machines whose microoperations require multiple machine cycles on a subcycle basis. The technique is applicable to microinstruction formats varying from horizontal to partially encoded, and to vertical. The technique includes global optimization algorithms for microprograms containing loops and recursive subroutines. Evaluation of the technique is performed from both the viewpoints of the complexity of the devised algorithms, and efficiency of generated object microcodes. Mario Tokoro, Euji Tamura, Takashi Takizuka |
IEEE Trans. Computers | 2 |
| 1978 | A module level simulation technique for systems composed of LSI's and MSI's
Mario Tokoro, Masayuki Ishigami, Euji Tamura, Terunobu Ishimitsu, Hisashi Ohara |
DAC | 4 |