Recent advances in artificial intelligence (AI), including the widespread adoption of foundational models, have triggered changes across Computing Science (CS) programs. Developments include, but are not limited to, revisions to assessment practices, updates to academic integrity policies, curriculum redesign to integrate emerging concepts, and the growing use of conversational agents to support instruction. These developments aim to address effective preparation of graduates for an evolving AI innovation landscape.

Irregular codes are bottlenecked by memory and communication latency. Decoupled access/execute (DAE) is a common technique to tackle this problem. It relies on the compiler to separate memory address generation from the rest of the program, however, such a separation is not always possible due to control and data dependencies between the access and execute slices, resulting in a loss of decoupling. In this paper, we present compiler support for speculation in DAE architectures that preserves decoupling in the face of control dependencies. We speculate memory requests in the access slice and poison mis-speculations in the execute slice without the need for replays or synchronization. Our transformation works on arbitrary, reducible control flow and is proven to preserve sequential consistency. We show that our approach applies to a wide range of architectural work on CPU/GPU prefetchers, CGRAs, and accelerators, enabling DAE on a wider range of codes than before.

This study examines the development of reflective practice among students in an undergraduate work-based Software Engineering program. Using two established models of reflection - Boud et al.'s Model of Reflective Process and Bain et al.'s 5R Framework for Reflection - we analyse a series of reflective reports submitted by students over four years. Our longitudinal analysis reveals clear trends in how students' reflective abilities evolve over the course of the program. We find that more sophisticated forms of reflection, such as integration of knowledge, appropriation of skills, and reconstruction of practice, increase markedly in prevalence in later years. The complementary nature of workplace experience and university study is highlighted in students' reflections, demonstrating a key benefit of the work-based learning approach. Our findings provide insight into how reflective practice develops in Software Engineering education and suggest potential value in incorporating more structured reflection into traditional degree programs.

The software engineering graduate apprenticeship program at the School of Computing, University of Glasgow, has a significant emphasis on work-based learning (WBL), with approximately 80% of the students' time over four years spent in the workplace. This work-based aspect of the program plays a more prominent role in the final two years, by which time apprentices are undertaking increasingly larger roles in the workplace. In this report, we present how we addressed the challenge of structuring and assessing WBL in these senior years such that there is a balance between professional competency attainment and ranked academic achievement, while providing a fair and flexible structure. Based on a model of WBL presented by Raelin in 1997, we outline our rationale for dividing the assessments into workplace projects, workplace journal, and a portfolio of artefacts. The projects are categorised into different types both for flexibility and to encourage academia-industry collaboration, the workplace journal encourages higher forms of reflection, while the portfolio assessment encourages and assesses the attainment of professional competencies. We present our experience of implementing this structure, an analysis of student feedback, and the adjustments made in response. With an increasing focus on work-ready skills and competency-based education in software engineering education, we expect the theory-informed structure we developed, and our experience of running and adapting it, to serve as an exemplar for developing a WBL program at research-led institutions.

Dynamic High-Level Synthesis (HLS) uses additional hardware to perform memory disambiguation at runtime, increasing loop throughput in irregular codes compared to static HLS. However, most irregular codes consist of multiple sibling loops, which currently have to be executed sequentially by all HLS tools. Static HLS performs loop fusion only on regular codes, while dynamic HLS relies on loops with dependencies to run to completion before the next loop starts.

Work-based learning (WBL) programs in Software Engineering provide students with opportunities to apply academic knowledge in the workplace. However, how students navigate the transition between knowledge and skills acquired at university and their application in the workplace remains largely unexplored. We implemented a WBL Software Engineering program in which students spend most of their time in the workplace rather than at university. Reflective student essays were used to examine how our implementation supports the integration and transfer of learning between academic and professional contexts. University modules - such as those on software design patterns and programming - offered directly applicable skills, while foundational knowledge and problem-solving frameworks supported further development. Workplace experiences reinforced understanding, provided context, and enabled practical application. However, skills such as project management, leadership, and context switching were primarily developed in the workplace, revealing gaps between academic team projects and industry needs. Difficulties in transferring some advanced technical skills also point to a disconnect between academic instruction and industry application. Our findings suggest a cyclical relationship between university and workplace learning, with each enhancing the other. We propose key considerations for WBL program design, including curriculum alignment, structured skill development, and integrated delivery. Finally, we underscore the value of reflective essays in observing and supporting skill integration.

Competencies may be defined as the knowledge, skills, and professional dispositions that an individual is required to demonstrate in order to be considered professionally competent. Competency-based education has long been a feature of professional degree programs, but the discipline of Computing Science has only recently begun to embrace competencies as a means of structuring or evaluating students' learning. Meanwhile, the practice of work-based learning - also well-established in other professional disciplines - has become more prevalent in Computing Science education, with increasing emphasis placed on work-based modes of learning, such as internships and apprenticeships. In this paper, we examine how students enrolled on a degree-level apprenticeship in Software Engineering have developed their professional competencies in the workplace. The paper is based on an analysis of 38 student assignments, wherein apprentices were asked to identify the competencies they have demonstrated, with reference to a portfolio of work. The UK Standard for Professional Engineering Competence and Commitment, which outlines the competencies required for certification as an Incorporated Engineer, provided the necessary framework. Competencies relating to communication and inter-personal skills were among those most often cited by apprentices, with competencies relating to knowledge and understanding and design and development systems also featuring prominently. Competencies relating to responsibility, management, or leadership were less prevalent, with professional commitment proving to be the least commonly cited category of competencies. We provide examples of how apprentices claim to have demonstrated each competency, and discuss the implications of these findings for competency-based learning in Computing Science education.

Dynamically scheduled high-level synthesis (HLS) achieves higher throughput on codes with unpredictable memory accesses compared to static HLS. However, dynamic scheduling results in circuits that use more resources and have a slower critical path, even if only a small part of the circuit exhibits dynamic behavior. In this extended abstract, we propose to introduce dynamically scheduled memory operations into static HLS. Our goal is to reach the same throughput as dynamic HLS on codes with irregular memory accesses while achieving comparable resource usage and critical paths as static HLS.

Dynamically scheduled high-level synthesis (HLS) achieves higher throughput than static HLS for codes with unpredictable memory accesses and control flow. However, excessive dataflow scheduling results in circuits that use more resources and have a slower critical path, even when only a part of the circuit exhibits dynamic behavior. Recent work has shown that marking parts of a dataflow circuit for static scheduling can save resources and improve performance (hybrid scheduling), but the dynamic part of the circuit still bottlenecks the critical path. We propose instead to selectively introduce dynamic scheduling into static HLS. This paper presents an algorithm for identifying code regions amenable to dynamic scheduling and shows a methodology for introducing dynamically scheduled basic blocks, loops, and memory operations into static HLS. Our algorithm is informed by modulo-scheduling and can be integrated into any modulo-scheduled HLS tool. On a set of ten benchmarks, we show that our approach achieves on average an up to 3.7× and 3× speedup against dynamic and hybrid scheduling, respectively, with an area overhead of 1.3× and frequency degradation of 0.74× when compared to static HLS.

We have seen students struggling with fully understanding the algorithms when required to trace pseudocode for an Algorithmics course, even though examples and exercises on tracing each algorithm are provided throughout. This course is being taught in year 2 of the new Graduate Apprenticeship in Software Engineering programme (GA) [2], covering fundamental string and graph algorithms and basic computability topics.

Work-based degree programmes are seen as a means of addressing the reported lack of employability skills in Computing Science (CS) graduates. In the UK, work-based CS degree programmes – or apprenticeships – were established to close this skills gap. In Scotland, a national ‘meta-skills’ framework has been developed, comprising twelve employability skills (for example, ‘Adapting’, ‘Communicating’) grouped under three headings (Self management, Social intelligence, and Innovation). This paper explores how a cohort of Software Engineering apprentices (N = 30) developed these meta-skills during their time in the workplace, across the first year of their programme. Apprentices were asked to report on the meta-skills they felt they had developed most in the workplace, with reference to the published framework. The most prevalent skill said to have been developed in the workplace was ‘Communicating’, followed by ‘Focusing’ and ‘Adapting’, both of which fall under the heading of ‘Self management’. The data presented here illustrate how students developed their meta-skills while working as apprentice Software Engineers. Meanwhile, a significant emergent theme that appears to underpin the development of many of these meta-skills is confidence. This work provides evidence of how a Software Engineering apprenticeship may develop specific employability skills. It supports assumptions about the benefits of work-based learning in computing education, and suggests that apprenticeships may help address the employability skills deficit in CS graduates.

FPGAs are attractive for scientific high-performance computing due to their potential for high performance-per-Watt. Stencil codes in scientific applications are difficult to optimize on FPGAs, because of redundant, non-contiguous memory accesses to relatively low bandwidth DRAM. In this paper, we present an algorithm to aggressively reduce on-chip block RAM (BRAM) and off-chip DRAM utilisation of stencil codes running on FPGAs. The algorithm extracts memory accesses from computational pipelines and removes all redundant intermediate arrays, including those used for stencil buffering, by trading DRAM accesses for computation. The algorithm is based on rewrite-rules on a strict functional representation derived from Fortran code and generates provably correct, optimized code. Typical FPGA implementations store the stencil window in on-chip shift registers implemented in BRAMs; we use only DRAM and optimize the memory accesses instead. Our approach dramatically reduces BRAM usage so that the domain size is only limited by available DRAM. We report a drop of 78% and 18% in BRAM usage in 3-D and 2-D stencil codes compared to a manual implementation using shift registers while staying competitive in performance or even improving performance-per-Watt.

Competency-based learning has been a successful pedagogical approach for centuries, but only recently has it gained traction within computing education. Building on recent developments in the field, this working group will explore competency-based learning from practical considerations and show how it benefits computing. In particular, the group will identify existing computing competencies and provide a pathway to generate competencies usable in the field. The working group will also investigate appropriate assessment approaches, provide guidelines for evaluating student attainment, and show how accrediting agencies can use these techniques to assess the level of competence reflected in their standards and criteria. Recommendations from the working group report are intended to help practical computing education writ large.

The COVID-19 pandemic has resulted in widespread changes to how the higher education sector operates. In this paper, the experience of delivering an eight-week undergraduate Software Engineering programme during the pandemic is discussed. The programme in question exhibits a number of unique features, including the intensive nature of the teaching, and the timing of its delivery, which coincided almost exactly with the introduction of lockdown measures. Reflections are offered on the rapid transition to online delivery of three different modules, including consideration of students' wellbeing. The implications for Software Engineering education, and online education more broadly, are considered.

We needed to design a module covering both discrete maths and algorithms for a Work Based Learning (WBL) Software Engineering degree programme, where students spend half their time at their employers' workplace. This entails deciding the order of topics, and explaining that to students. Sequence in the course is only one kind of relationship between topics in the module; relevance to work is another. Such explaining is a neglected educational issue. This paper addresses how to convey these relationships to learners. Because of the WBL context, it is inevitable that questions about how pieces of academic learning relate to the work context (which these students are already experiencing) arise immediately and vividly for them. This is important because it affects learner motivation, sometimes greatly, and also whether they are likely to learn in a surface or a deep mode. A given learner's grasp of these relationships is both individual and changes over time. Because of this, the general pedagogical approach discussed here is “little and often”: raising it a number of times, with an emphasis not on one exhaustive and rigid view but on how different students often see it differently, and encouraging each to gradually develop their own view. The concept map diagram in this paper illustrates only one example of how the web of connections might be represented and conveyed during the course.

High-performance computing on heterogeneous platforms in general and those with FPGAs in particular presents a significant programming challenge. We contend that compiler technology has to evolve to automatically optimize applications by transforming a given original program. We are developing a novel methodology based on type transformations on a functional description of a given scientific kernel, for generating correct-by-construction design variants. An associated lightweight costing mechanism for evaluating these variants is a cornerstone of our methodology, and the focus of this paper. We discuss our use of the roofline model to work with our optimizing compiler to enable us to quickly derive accurate estimates of performance from the design’s representation in our custom intermediate language. We show results confirming the accuracy of our cost model by validating it on different scientific kernels. A case study is presented to demonstrate that a solution created from our optimizing framework outperforms commercial high-level synthesis tools both in terms of throughput and power efficiency.

To address the challenges of the consumer wireless device industry, we have designed a dynamically reconfigurable architecture with flexibility limited to address the MAC layer. It is a Software/Hardware partitioned platform in which critical tasks are delegated to a dynamically reconfigurable hardware co-processor. It will handle data streams of multiple (up to 3) different protocol standards, by reconfiguring on a packet-by-packet basis. The Interface and Reconfiguration Controller uses a combination of controllers to dynamically reconfigure the functional units in the architecture and delegate MAC tasks to them. Results of packet transmission on a prototype model indicate that the device handles three transmission requests from different protocol modes in a fraction of the packet durations.