Demo Data from VLDB 2026 / reviewers in the wild / expert
Qingran Zheng
dblp:221/2854
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2018
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test
analog/mixed-signal verification |
0.3 | 1 | 2018 | HFMV: hybridizing formal methods and machine learning for verification of analog and mixed-signal circuits · DAC 2018 |
Electronic design automation
hardware verification and test |
0.3 | 1 | 2018 | HFMV: hybridizing formal methods and machine learning for verification of analog and mixed-signal circuits · DAC 2018 |
Methods — techniques the papers use, named apart from their topics
probabilistic learning model · 0.3formal methods · 0.3active learning · 0.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2018 | HFMV: hybridizing formal methods and machine learning for verification of analog and mixed-signal circuitsabstractWith increasing design complexity and robustness requirement, analog and mixed-signal (AMS) verification manifests itself as a key bottleneck. While formal methods and machine learning have been proposed for AMS verification, these two techniques suffer from their own limitations, with the former being specifically limited by scalability and the latter by the inherent uncertainty in learning-based models. We present a new direction in AMS verification by proposing a hybrid formal/machine-learning verification technique (HFMV) to combine the best of the two worlds. HFMV adds formalism on the top of a probabilistic learning model while providing a sense of coverage for extremely rare failure detection. HFMV intelligently and iteratively reduces uncertainty of the learning model by a proposed formally-guided active learning strategy and discovers potential rare failure regions in complex high-dimensional parameter spaces. It leads to reliable failure prediction in the case of a failing circuit, or a high-confidence pass decision in the case of a good circuit. We demonstrate that HFMV is able to employ a modest amount of data to identify hard-to-find rare failures which are completely missed by state-of-the-art sampling methods even with high volume sampling data. Hanbin Hu, Qingran Zheng, Peng Li 0001 |
DAC | 2 |