Integrated sensing and communication (ISAC) can realize communication and sensing functionalities simultaneously by sharing spectrum and hardware resources, where the sensing performance can be guaranteed by accurate range and velocity estimation. However joint range and velocity estimation inherently confronts the accuracy-complexity tradeoff. Therefore, a low-complexity joint range and velocity estimation algorithm is developed in this work, referred to as the particle swarm optimization reconstructed subspace multiple signal classification (PSO-RS-MUSIC). The proposed algorithm leverages optimized subspace reuse mechanisms to enhance estimation accuracy. To address the high complexity problem, the PSO-RS-MUSIC algorithm employs the particle swarm optimization (PSO) technique to replace the traditional spectral peak search, thereby reducing computational complexity significantly. Simulation results illustrate that the proposed algorithm outperforms the conventional RS-MUSIC algorithm, while the computational complexity is reduced by more than 90%.

High-performance (HP) elliptic curve scalar multiplication (ECSM) hardware implementations hold significant importance in ensuring communication security in high-capacity and high-concurrence application scenarios. By analyzing the inherent priorities and parallelism in ECSMs, we proposed a novel HP ECSM algorithm and a partially parallel inversion algorithm based on the interleaved mechanism. With two dedicated multipliers and one interleaved multiplier, we introduced a compact hardware scheduling scheme to realize the consumption of four clock cycles within each loop of ECSM. The proposed HP ECSM architecture consists of two Karatsuba-Ofman multipliers (KOMs) and one classical multiplier (CM). The multiplexors and pipeline stages are meticulously designed to optimize the critical path (CP). The proposed architecture is implemented over Virtex-7 field-programmable gate array (FPGA), and the throughput reaches 158.03, 138.23, and 117.50 Mbps over$\text {GF}(2^{163})$,$\text {GF}(2^{283})$, and$\text {GF}(2^{571})$using 8762, 20451, and 41974 slices, respectively. The comparisons with recent existing works demonstrate that the performance and throughput of our design are among the top.

Simultaneously transmitting and reflecting reconfigurable intelligent surface (STAR-RIS) is emerging as a promising technology by achieving full-space coverage and further improving system performance. However, most existing works adopted an independent phase-shift model, which is high-cost and may be difficult to achieve in realistic wideband systems. Consequently, a coupled phase-shift STAR-RIS enhanced downlink multi-user multiple-input single-output orthogonal frequency division multiplexing system is investigated for both unicast and broadcast communications in this paper. We aim to maximize the average sum-rate (ASR) for all subcarriers by jointly optimizing the precoding matrices and the reflecting and transmitting coefficients (RTCs). Specifically, a block coordinate descent algorithm is proposed to iteratively design each block of a multiblock problem reformulated by the original one. The precoding matrices are optimized by the Lagrangian multiplier method for low computational complexity. For the RTCs, an element-based alternating optimization algorithm is proposed to optimize the coupled phase-shift and amplitude coefficients. Simulation results validate the effectiveness of the proposed algorithm by comparing the ASR with that of other benchmarks. Moreover, its performance closely approaches the upper bound under various practical user proportion scenarios on both sides of the STAR-RIS.

Elliptic curve scalar multiplication (ECSM) is the essential operation in elliptic curve cryptography (ECC) for achieving high performance and security. We introduce a novel high-performance ECSM architecture over binary fields to meet the growing demand for performance and security. A low-latency window (LLW) recoding algorithm for hardware implementation is proposed to enhance the resistance toward side-channel attacks (SCAs). Based on the LLW algorithm, we propose an enhanced comb method for ECSM with a unified point addition (PA) and point doubling (PD) pattern. The theoretical analysis demonstrates that the enhanced comb method with$w=4$strikes the balance of computation burden for both extreme cases. To achieve short clock cycle latency and high frequency, the data dependency of ECSM is thoroughly analyzed, and we explore a timing schedule with one two-stage pipelined Karatsuba multiplier accumulator (MAC). The datapath of the proposed architecture is well-designed, ensuring that the critical path (CP) only contains minimal logic primitives apart from the MAC. Besides, the ideal placement of pipeline stages for MAC is illustrated. The proposed architecture has been implemented on Xilinx Virtex-7 series field-programmable gate arrays (FPGAs) and performs ECSM in 2.51, 4.93, and$10.85 ~\mu \text { s}$with 3422, 7983, and 20158 slices over$\text {GF}(2^{163})$,$\text {GF}(2^{283})$, and$\text {GF}(2^{571})$, respectively. Implementation results reveal that our design shows 53.60%, 39.36%, and 32.64% performance improvement over the existing state-of-the-art works, respectively.

With the widespread connectivity of everyday devices realized by the advent of the Internet of Things (IoT), communication between users of different devices has become increasingly close. In practical scenarios, obstacles present between the transceiver may cause a deterioration in the quality of the received signals. Therefore, the reconfigurable intelligent surface (RIS) is employed to create virtual Line-of-Sight (LoS) channels in an IoT network. Specifically, this article aims at maximizing the sum-rate of the RIS-assisted multiuser multiple-input–single-output (MU-MISO) communication systems by jointly optimizing the phase shift matrix of the RIS and transmit beamforming. To solve the formulated nonconvex problem, a piecewise-deep reinforcement learning (DRL) algorithm is proposed in this article. Unlike the existing alternative optimization (AO) algorithms, the proposed algorithm avoids falling into the local optimal by using an exploration mechanism. Moreover, piecewise-DRL can reduce the action dimension, allowing the algorithm to obtain faster convergence. Simultaneously, this algorithm also ensures that the parameters of the two-part networks are updated to generate a larger system sum-rate by unsupervised joint optimization. Simulations in various circumstances reveal that the proposed approach is more robust and presents better stability and faster convergence than previous state-of-the-art algorithms while obtaining competitive performance.

Multiple Signal Classification (MUSIC) is a high-performance Direction of Arrival (DOA) estimation algorithm, which has been widely used. The algorithm needs to calculate the covariance matrix, eigenvalue decomposition and spectral peak search. In the paper, the hardware structure of the existing Jacobi algorithm for Hermitian matrices is proposed. On this basis, a novel hardware acceleration of the MUSIC algorithm for sparse arrays and uniform linear arrays is proposed, and the sparse array is a nested array. There are two designs, Design 1 supports 1~10 nested array elements or 1~32 uniform linear array elements, distinguishes 1~32 sources, configures snapshots 1~2048, and the maximum number of iterations and iteration accuracy of the complex Jacobi algorithm. Design 2 only needs$101.8~\mu $s to complete a DOA estimation when the number of array elements is 8, the number of sources is 1, and the snapshots is 128. In more detail, the Root Mean Squared Error (RMSE) of both can reach 0.03°. The logic resources on the Zynq-7000 development board are 14,761 and 28,305 Look-Up Tables (LUTs), respectively.

For underwater acoustic communication, pilot pattern optimization is usually investigated to improve the performance of channel estimation based on compressed sensing (CS) in orthogonal frequency division multiplexing (OFDM) systems. However, there is no deterministic criteria to design a perfect pilot pattern utilizing the measurement matrix, and no mature methods to quantitatively measure the relationship between the influence indicators and estimation performance of pilot patterns. An analytical method with grey correlation degree is proposed to try to solve the problem. The influence indicators are weighted with information entropy and the grey correlation degrees of various optimization strategies are calculated. Experimental results demonstrate the proposed method is intuitive and effective, due to the order of the grey correlation degrees entirely consists with the order of the channel estimation performance on bit error rate (BER) and mean square error (MSE). Moreover, it is indicated that the ratio of large off-diagonal entries in the Gram matrix has a greater impact on the performance of channel estimation compared to the minimal mutual coherence, the ratio of small off-diagonal entries, and the ratio of middle off-diagonal entries.

The convolutional neural network (CNN) has become widely used in a variety of vision recognition applications, and the hardware acceleration of CNN is in urgent need as increasingly more computations are required in the state-of-the-art CNN networks. In this paper, we propose a pipelined architecture for CNN acceleration. The probability of both inner-layer and inter-layer pipeline for typical CNN networks is analyzed. And two types of data re-ordering methods, the filter-first (FF) flow and the image-first (IF) flow, are proposed for different kinds of layers. Then, a pipelined CNN accelerator for AlexNet is implemented, the dataflow of which can be reconfigurably selected for different layer processing. Simulation results show that the proposed pipelined architecture achieves 43% performance improvement compared with the non-pipelined ones. The AlexNet accelerator is implemented in 65nm CMOS technology working at 200MHz, with 350mW power consumption and 24GFLOPS peak performance.