VLDB 2026 Research / reviewers in the wild / expert
Martin Schwarzl
dblp:223/9857
· DBLP profile ↗
15ranked-venue papers
4as first author
12since 2021 · last 2025
0009-0002-3760-1929ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Security and privacy · 15 · 4 first-author · 12 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | TME-Box: Scalable In-Process Isolation through Intel TME-MK Memory Encryption
Martin Unterguggenberger, Lukas Lamster, David Schrammel, Martin Schwarzl, Stefan Mangard |
NDSS | 4 |
| 2023 | Layered Binary Templating
Martin Schwarzl, Erik Kraft, Daniel Gruss |
ACNS (1) | 1 |
| 2023 | DOPE: DOmain Protection Enforcement with PKSabstractThe number of Linux kernel vulnerabilities discovered has increased drastically over the past years. In the kernel, even simple memory safety vulnerabilities can have devastating consequences, e.g., compromising the entire system. Efforts to mitigate these vulnerabilities have so far focused mainly on control-flow hijacking attacks in the kernel. Yet, data-oriented attacks remain largely unmitigated in practice as existing mitigations are limited in providing robust security guarantees at reasonable performance overhead for multiple sensitive data objects. Lukas Maar, Martin Schwarzl, Fabian Rauscher, Daniel Gruss, Stefan Mangard |
ACSAC | 2 |
| 2023 | SQUIP: Exploiting the Scheduler Queue Contention Side ChannelabstractModern superscalar CPUs have multiple execution units that independently execute operations from the instruction stream. Previous work has shown that numerous side channels exist around these out-of-order execution pipelines, particularly for an attacker running on an SMT core.In this paper, we present the SQUIP attack, the first side-channel attack on scheduler queues, which are critical for deciding the schedule of instructions to be executed in superscalar CPUs. Scheduler queues have not been explored as a side channel so far, as Intel CPUs only have a single scheduler queue, and contention thereof would be virtually the same as contention of the reorder buffer. However, the Apple M1, AMD Zen 2, and Zen 3 microarchitectures have separate scheduler queues per execution unit. We first reverse-engineer the behavior of the scheduler queues on these CPUs and show that they can be primed and probed. The SQUIP attack observes the occupancy level from within the same hardware core and across SMT threads. We evaluate the performance of the SQUIP attack in a covert channel, exfiltrating 0.89 Mbit/s from a co-located virtual machine at an error rate below 0.8 %, and 2.70 Mbit/s from a co-located process at an error rate below 0.8 %. We then demonstrate the side channel on an mbedTLS RSA signature process in a co-located process and in a co-located virtual machine. Our attack recovers full RSA-4096 keys with only 50 500 traces and less than 5 to 18 bit errors on average. Finally, we discuss mitigations necessary, especially for Zen 2 and Zen 3 systems, to prevent our attacks. Stefan Gast, Jonas Juffinger, Martin Schwarzl, Gururaj Saileshwar, Andreas Kogler, Simone Franza, Markus Köstl, Daniel Gruss |
SP | 3 |
| 2023 | Practical Timing Side-Channel Attacks on Memory CompressionabstractCompression algorithms have side channels due to their data-dependent operations. So far, only the compression-ratio side channel was exploited, e.g., the compressed data size.In this paper, we present Decomp+Time, the first memory-compression attack exploiting a timing side channel in compression algorithms. While Decomp+Time affects a much broader set of applications than prior work. A key challenge is precisely crafting attacker-controlled compression payloads to enable the attack with sufficient resolution. Our evolutionary fuzzer, Comprezzor, finds effective Decomp+Time payloads that optimize latency differences such that decompression timing can even be exploited in remote attacks. Decomp+Time has a capacity of 9.73 kB/s locally, and 10.72 bit/min across the internet (14 hops). Using Comprezzor, we develop attacks that leak data bytewise in four different case studies: First, we leak 1.50 bit/min from Memcached on a remote PHP script. Second, we leak database records with 2.69 bit/min, from PostgreSQL in a Python-Flask application, over the internet. Third, we leak secrets with 49.14 bit/min locally from ZRAM-compressed pages on Linux. Fourth, we leak internal heap pointers from the V8 engine within the Google Chrome browser on a system using ZRAM. Thus, it is important to re-evaluate the use of compression on sensitive data even if the application is only reachable via a remote interface. Martin Schwarzl, Pietro Borrello, Gururaj Saileshwar, Hanna Müller, Michael Schwarz 0001, Daniel Gruss |
SP | 1 |
| 2023 | Collide+Power: Leaking Inaccessible Data with Software-based Power Side Channels
Andreas Kogler, Jonas Juffinger, Lukas Giner, Lukas Gerlach 0001, Martin Schwarzl, Michael Schwarz 0001, Daniel Gruss, Stefan Mangard |
USENIX Security Symposium | 5 |
| 2023 | Side-Channel Attacks on Optane Persistent Memory
Sihang Liu 0001, Suraaj Kanniwadi, Martin Schwarzl, Andreas Kogler, Daniel Gruss, Samira Manabi Khan |
USENIX Security Symposium | 3 |
| 2022 | Robust and Scalable Process Isolation Against Spectre in the Cloud
Martin Schwarzl, Pietro Borrello, Andreas Kogler, Kenton Varda, Michael Schwarz 0001, Daniel Gruss |
ESORICS (2) | 1 |
| 2022 | Systematic Analysis of Programming Languages and Their Execution Environments for Spectre AttacksabstractIn this paper, we analyze the security of programming languages and their execution environments (compilers and interpreters) with respect to Spectre attacks. The analysis shows that only 16 out of 42 execution environments have mitigations against at least one Spectre variant, i.e., 26 have no mitigations against any Spectre variant. Using our novel tool Speconnector, we develop Spectre proof-of-concept attacks in 8 programming languages and on code generated by 11 execution environments that were previously not known to be affected. Our results highlight some programming languages that are used to implement security-critical code, but remain entirely unprotected, even three years after the discovery of Spectre. Amir Naseredini, Stefan Gast, Martin Schwarzl, Pedro Miguel Sousa Bernardo, Amel Smajic, Claudio Canella, Martin Berger 0001, Daniel Gruss |
ICISSP | 3 |
| 2022 | Remote Memory-Deduplication Attacks
Martin Schwarzl, Erik Kraft, Moritz Lipp, Daniel Gruss |
NDSS | 1 |
| 2022 | ÆPIC Leak: Architecturally Leaking Uninitialized Data from the Microarchitecture
Pietro Borrello, Andreas Kogler, Martin Schwarzl, Moritz Lipp, Daniel Gruss, Michael Schwarz 0001 |
USENIX Security Symposium | 3 |
| 2022 | Rapid Prototyping for Microarchitectural Attacks
Catherine Easdon, Michael Schwarz 0001, Martin Schwarzl, Daniel Gruss |
USENIX Security Symposium | 3 |
| 2020 | KASLR: Break It, Fix It, RepeatabstractIn this paper, we analyze the hardware-based Meltdown mitigations in recent Intel microarchitectures, revealing that illegally accessed data is only zeroed out. Hence, while non-present loads stall the CPU, illegal loads are still executed. We present EchoLoad, a novel technique to distinguish load stalls from transiently executed loads. EchoLoad allows detecting physically-backed addresses from unprivileged applications, breaking KASLR in 40's on the newest Meltdown- and MDS-resistant Cascade Lake microarchitecture. As EchoLoad only relies on memory loads, it runs in highly-restricted environments, e.g., SGX or JavaScript, making it the first JavaScript-based KASLR break. Based on EchoLoad, we demonstrate the first proof-of-concept Meltdown attack from JavaScript on systems that are still broadly not patched against Meltdown, i.e., 32-bit x86 OSs. We propose FLARE, a generic mitigation against known microarchitectural KASLR breaks with negligible overhead. By mapping unused kernel addresses to a reserved page and mirroring neighboring permission bits, we make used and unused kernel memory indistinguishable, i.e., a uniform behavior across the entire kernel address space, mitigating the root cause behind microarchitectural KASLR breaks. With incomplete hardware mitigations, we propose to deploy FLARE even on recent CPUs. Claudio Canella, Michael Schwarz 0001, Martin Haubenwallner, Martin Schwarzl, Daniel Gruss |
AsiaCCS | 4 |
| 2020 | Donky: Domain Keys - Efficient In-Process Isolation for RISC-V and x86
David Schrammel, Samuel Weiser, Stefan Steinegger, Martin Schwarzl, Michael Schwarz 0001, Stefan Mangard, Daniel Gruss |
USENIX Security Symposium | 4 |
| 2019 | NetSpectre: Read Arbitrary Memory over Network
Michael Schwarz 0001, Martin Schwarzl, Moritz Lipp, Jon Masters, Daniel Gruss |
ESORICS (1) | 2 |