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Adam Hastings

dblp:228/3342 · DBLP profile ↗
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3ranked-venue papers
2as first author
3since 2021 · last 2025
0000-0003-0803-3571ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author · 2 since 2021Security and privacy · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware reliability and fault tolerance · 88% Memory systems · 12%
Network and information security
2 papers
Network security · 60% Systems and software security · 40%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Network security › security economics
cyber insurance
0.912025
Voluntary Investment, Mandatory Minimums, or Cyber Insurance: What Minimizes Losses? · USENIX Security Symposium 2025
Systems and software security › memory safety › hardware-enforced memory safety
memory tagging
0.612022
Revisiting Residue Codes for Modern Memories · MICRO 2022
Hardware reliability and fault tolerance › error correction
error-correcting codes
0.612022
Revisiting Residue Codes for Modern Memories · MICRO 2022
Hardware reliability and fault tolerance › arithmetic codes
residue codes
0.612022
Revisiting Residue Codes for Modern Memories · MICRO 2022
Memory systems › DRAM
rowhammer
0.212022
Revisiting Residue Codes for Modern Memories · MICRO 2022
Hardware reliability and fault tolerance
soft errors
0.212022
Revisiting Residue Codes for Modern Memories · MICRO 2022
YearPublicationVenuePosition
2025 Voluntary Investment, Mandatory Minimums, or Cyber Insurance: What Minimizes Losses?
Adam Hastings, Simha Sethumadhavan
USENIX Security Symposium1
2023 How Much is Performance Worth to Users?
abstract
In computer systems design, computer architects can evaluate features and techniques in terms of traditional design metrics like power, performance, and area but not in terms of net benefit or cost to the end user. For example, a security feature may come at a 10% cost to performance, but is this worth the tradeoff? The problem is that user-level features like security, privacy, and usability can be converted into a monetary amount but traditional architecture metrics (which lack the notion of user value) cannot. In this paper, we make the first known attempt to bridge this gap: We conduct two studies (one of which is incentive compatible) that elicit the value of performance in terms of US$ to end users. Thus in this work, we make the first known quantitative measurement of the tradeoff between performance and user value, providing architects with a novel design metric and filling a crucial gap in the end-to-end quantitative evaluation of systems.
Adam Hastings, Lydia B. Chilton, Simha Sethumadhavan
CF1
2022 Revisiting Residue Codes for Modern Memories
abstract
Residue codes have been traditionally used for compute error correction rather than storage error correction. In this paper, we use these codes for storage error correction with surprising results. We find that adapting residue codes to modern memory systems offers a level of error correction comparable to traditional schemes such as Reed-Solomon with fewer bits of storage. For instance, our adaptation of residue code – MUSE ECC – can offer ChipKill protection using approximately 30% fewer bits. We show that the storage gains can be used to hold metadata needed for emerging security functionality such as memory tagging or to provide better detection capabilities against Rowhammer attacks. Our evaluation shows that memory tagging in a MUSE-enabled system shows a 12% reduction in memory bandwidth utilization while providing the same level of error correction as a traditional ECC baseline without a noticeable loss of performance. Thus, our work demonstrates a new, flexible primitive for co-designing reliability with security and performance.
Evgeny Manzhosov, Adam Hastings, Meghna Pancholi, Ryan Piersma, M. Tarek Ibn Ziad, Simha Sethumadhavan
MICRO2