VLDB 2026 Research / reviewers in the wild / expert
Mihir Parang Mehta
dblp:228/7993
· DBLP profile ↗
2ranked-venue papers
1as first author
1since 2021 · last 2022
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Theory of computation · 2 · 1 first-author · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | Error Correction Code Algorithm and Implementation Verification Using Symbolic RepresentationsabstractError-correction codes (ECCs) are becoming a de rigueur feature in modern memory subsystems, as it becomes increasingly important to safeguard data against random bit corruption.ECC architecture constantly evolves towards designs that leverage complex mathematics to minimize check-bits and maximize the number of data bits protected, as a result of which subtle bugs may be introduced into the design.These algorithms traverse a vast data space and are subject to corner case bugs which are hard to catch through constraint-based randomized testing.This necessitates formal verification of ECC designs to assure correctness of the algorithm and its hardware implementation.In this paper we present a technique of representing various ECC algorithm outputs as Boolean equations in the form of Boolean Decision Diagrams (BDDs) to facilitate reasoning about the algorithms.We also discuss the counting and generation of examples from the BDD representations and how it aids in tuning ECC algorithms for performance and security.Additionally, we display the use of Symbolic Trajectory Evaluation (STE) to prove the correctness of register transfer level (RTL) implementations of these algorithms.We discuss the scaling up of this verification methodology, using different complexity and convergence techniques.We apply these techniques to a number of complex ECC designs at Intel and showcase their efficacy on several categories of bugs. Aarti Gupta, Roope Kaivola, Mihir Parang Mehta |
FMCAD | 3 |
| 2019 | Binary-Compatible Verification of Filesystems with ACL2abstractFilesystems are an essential component of most computer systems. Work on the verification of filesystem functionality has been focused on constructing new filesystems in a manner which simplifies the process of verifying them against specifications. This leaves open the question of whether filesystems already in use are correct at the binary level. This paper introduces LoFAT, a model of the FAT32 filesystem which efficiently implements a subset of the POSIX filesystem operations, and HiFAT, a more abstract model of FAT32 which is simpler to reason about. LoFAT is proved to be correct in terms of refinement of HiFAT, and made executable by enabling the state of the model to be written to and read from FAT32 disk images. EqFAT, an equivalence relation for disk images, considers whether two disk images contain the same directory tree modulo reordering of files and implementation-level details regarding cluster allocation. A suite of co-simulation tests uses EqFAT to compare the operation of existing FAT32 implementations to LoFAT and check the correctness of existing implementations of FAT32 such as the mtools suite of programs and the Linux FAT32 implementation. All models and proofs are formalized and mechanically verified in ACL2. Mihir Parang Mehta, William R. Cook |
ITP | 1 |