VLDB 2026 Research / reviewers in the wild / expert
Guilang Feng
dblp:23/3637
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1996
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware reliability and fault tolerance · 100% | |
| Theoretical computer science
1 paper |
Coding theory · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware reliability and fault tolerance › error-correcting codes for memory
byte error correcting code |
0.0 | 1 | 1996 | A Generalization of the Single b-Bit Byte Error Correcting and Double Bit Error Detecting Codes for High-Speed Memory Systems · IEEE Trans. Computers 1996 |
Hardware reliability and fault tolerance › error correction
error-correcting codes |
0.0 | 1 | 1996 | A Generalization of the Single b-Bit Byte Error Correcting and Double Bit Error Detecting Codes for High-Speed Memory Systems · IEEE Trans. Computers 1996 |
Hardware reliability and fault tolerance
memory reliability |
0.0 | 1 | 1996 | A Generalization of the Single b-Bit Byte Error Correcting and Double Bit Error Detecting Codes for High-Speed Memory Systems · IEEE Trans. Computers 1996 |
Coding theory
error-correcting codes |
0.0 | 1 | 1996 | A Generalization of the Single b-Bit Byte Error Correcting and Double Bit Error Detecting Codes for High-Speed Memory Systems · IEEE Trans. Computers 1996 |
Methods — techniques the papers use, named apart from their topics
galois field generating sets · 0.0coset construction · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1996 | A Generalization of the Single b-Bit Byte Error Correcting and Double Bit Error Detecting Codes for High-Speed Memory SystemsabstractIn this paper, a general method using the subsets (generating sets) of GF(2/sup b/) for constructing the SbEC-DED codes will be presented. The constructions given in Fujiwara and Hamada (1992) are special cases of ours. For some values of b, the generating sets used in our constructions are larger than the cosets used in Fujiwara and Hamada (1992). Hence, a larger code length can be obtained. Sihai Xiao, Xiaofa Shih, Guilang Feng, T. R. N. Rao |
IEEE Trans. Computers | 3 |