A transformer model which consists of a nonlinear core with hysteresis and multiple windings is described as implemented in DSPICE. In contrast to previous implementations, the nonlinear behavior of the new model is described by continuous piecewise-hyperbolic functions characterized by three parameters. These parameters are the same as parameters previously published in the literature. A loop-traversing algorithm has been implemented which avoids discontinuities and eliminates both nonconvergence problems and the occurrence of erroneous voltage spikes during time-domain simulation. In the large-signal time-domain analysis the frequency-dependent eddy current losses in the core and wire losses are modeled. Additional effects, such as wire skin effect and temperature dependence, are also included. In the small-signal AC analysis the transformer is modeled as frequency-dependent lossy mutual inductors. For both analyses, the air gap and the elated fringe field effect are modeled by extending the magnetic path length of the core appropriately.>

An effective approach to two-dimensional compaction of VLSI circuit layouts is discussed. Active devices are described in terms of circular primitives called bubbles. The wires are treated topologically in that no geometric representation is used for them during compaction. This avoids expensive geometrical manipulations of the wires. Cells are compacted by moving bubbles one at a time along design rule preserving paths so as to minimize a cost function directly related to the size of the cell. Geometrical realizations of the wires are reconstructed at the end of the compaction process. The resulting routing has minimum wire length for each wire.>