Demo Data from VLDB 2026 / reviewers in the wild / expert
Jean Duprat
dblp:23/6399
· DBLP profile ↗
12ranked-venue papers
6as first author
0since 2021 · last 2001
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 7 · 4 first-authorTheory of computation · 5 · 2 first-authorDatabases, data management, data science and information retrieval · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Processor architecture and microarchitecture · 54% Integrated circuit design · 46% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture
computer arithmetic |
0.0 | 2 | 1993 | The CORDIC Algorithm: New Results for Fast VLSI Implementation · IEEE Trans. Computers 1993 New Redundant Representations of Complex Numbers and Vectors · IEEE Trans. Computers 1993 |
Processor architecture and microarchitecture › computer arithmetic
complex number representation |
0.0 | 1 | 1993 | New Redundant Representations of Complex Numbers and Vectors · IEEE Trans. Computers 1993 |
Integrated circuit design › digital arithmetic circuits
CORDIC |
0.0 | 1 | 1993 | The CORDIC Algorithm: New Results for Fast VLSI Implementation · IEEE Trans. Computers 1993 |
Integrated circuit design
redundant number representation |
0.0 | 1 | 1993 | New Redundant Representations of Complex Numbers and Vectors · IEEE Trans. Computers 1993 |
Integrated circuit design › digital arithmetic circuits
carry-free addition |
0.0 | 1 | 1993 | New Redundant Representations of Complex Numbers and Vectors · IEEE Trans. Computers 1993 |
Integrated circuit design
VLSI design |
0.0 | 1 | 1993 | The CORDIC Algorithm: New Results for Fast VLSI Implementation · IEEE Trans. Computers 1993 |
Methods — techniques the papers use, named apart from their topics
signed-digit arithmetic · 0.0carry-save representation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2001 | A construction of distributed reference counting
Luc Moreau 0001, Jean Duprat |
Acta Informatica | 2 |
| 1994 | Some Operators for On-Line Radix-2 Computations
Jean-Claude Bajard, Jean Duprat, Sylvanus Kla, Jean-Michel Muller |
J. Parallel Distributed Comput. | 2 |
| 1993 | New Redundant Representations of Complex Numbers and VectorsabstractThe authors present a redundant representation for complex numbers called polygonal representation. This representation enables fast carry-free addition, in a way quite similar to the carry-free addition in signed-digit number systems and is convenient for multiplication. The technique is generalized in order to handle n-dimensional vectors.> Jean Duprat, Yvan Herreros, Sylvanus Kla |
IEEE Trans. Computers | 1 |
| 1993 | The CORDIC Algorithm: New Results for Fast VLSI ImplementationabstractAfter a brief survey of the CORDIC algorithm, some new results that allow fast and easy signed-digit implementation of CORDIC, without modifying the basic iteration step are given. A slight modification would make it possible to use a carry-save representation of numbers, instead of a signed-digit one. The method, called the branching CORDIC method, consists of performing in parallel two classic CORDIC rotations. It gives a constant normalization factor. An online implementation of the algorithm is proposed with an online delay equal to 5 for the sine and cosine functions.> Jean Duprat, Jean-Michel Muller |
IEEE Trans. Computers | 1 |
| 1991 | New redundant representations of complex numbers and vectorsabstractA new redundant representation for complex numbers, called polygonal representation, is presented. This representation enables fast carry-free addition (in a way quite similar to the carry-free addition in signed-digits number systems), and is convenient for multiplication. In addition, the technique is extended to handle n-dimensional vectors.> Jean Duprat, Yvan Herreros, Sylvanus Kla |
IEEE Symposium on Computer Arithmetic | 1 |
| 1991 | Implementation of a VLSI polynomial evaluator for real-time applicationsabstractFast evaluation of polynomials is a major goal of computer science, since any continuous function may be approximated as accurately as desired by a polynomial. For instance, most part of current computers evaluate elementary functions using polynomial or rational approximations. J. Duprat and J.M. Muller (1988) presented a new operator, a polynomier, suitable for VLSI implementation, and specifically designed for polynomials computations. This polynomier is composed of two pipe-lined subparts : a squarer (i.e. an operator able to compute the square of a number), and a binomier (i.e. an element which computes expressions of the form Ax+B). The authors present some possible applications of the polynomier. They recall briefly the main characteristics of the architecture. They describe a VLSI implementation of this architecture and present an extension of this architecture to the two's complement computation.> Guy Corbaz, Jean Duprat, Bertrand Hochet, Jean-Michel Muller |
ASAP | 2 |
| 1990 | LAIOS: a parallel execution of PROLOG by data copies
Jean Duprat |
Future Gener. Comput. Syst. | 1 |
| 1990 | The Complexity of Searching in X+Y and Other Multisets
Michel Cosnard, Jean Duprat, Afonso Ferreira |
Inf. Process. Lett. | 2 |
| 1990 | Systolic Triangularization over Finite Fields
Michel Cosnard, Jean Duprat, Yves Robert |
J. Parallel Distributed Comput. | 2 |
| 1989 | Some results about on-line computation of functionsabstractComplexity results that allow the exact determination or bounding of the online delay of most common arithmetic and elementary functions are presented. These results show that many classical online operators presented in the literature are optimal in delay (but not necessarily in period). The authors propose a way to conserve, for large numbers of manipulations, the main advantage of online arithmetic (the capability of digit-level pipelining) by presenting sparse online arithmetic.> Jean Duprat, Yvan Herreros, Jean-Michel Muller |
IEEE Symposium on Computer Arithmetic | 1 |
| 1989 | Complexity of Selection in X + Y
Michel Cosnard, Jean Duprat, Afonso Ferreira |
Theor. Comput. Sci. | 2 |
| 1988 | Hardwired Polynomial Evaluation
Jean Duprat, Jean-Michel Muller |
J. Parallel Distributed Comput. | 1 |