This paper presents an energy-efficient True Random Number Generator (TRNG) architecture, referred to as the Modified Chaotic Logistic Map with Braided XOR Network (MCLM-BXN). The proposed system exploits the diffusion of noise from two 4-bit tapped Ring Oscillators (ROs), which serve as the entropy sources. These jitter-induced signals are injected into a Modified Chaotic Logistic Map (MCLM) module to enhance the generated randomness. To further improve entropy and reduce statistical correlation, an 8-input, 1-output Braided XOR Network (BXN) module is employed as a post-processing stage. The MCLM-BXN architecture is implemented on the INTEL 5CGXFC9D6F27C7 Cyclone V GT FPGA chip. Supported by the Data Storage and Transmitting Unit-300 (DSTU-300), the TRNG achieves a throughput of 300 Mbps. Experimental evaluations confirm high entropy levels, recording approximately 7.998893 bits/byte using the AIS-31 T8 test and 7.963032 bits/byte according to the NIST SP800-90B test. Furthermore, the proposed TRNG passes the full NIST SP800-22 statistical test suite, validating its effectiveness and suitability for cryptographic applications.

True Random Number Generators (TRNGs) are essential components of modern cryptographic and security systems, where the unpredictability and statistical quality of generated randomness directly determine the resilience of the system against attacks. This paper presents the TeLo-ROPN (Tent and Logistic–Ring Oscillator Parallel Network) TRNG system, a chaotic-map-enhanced TRNG for FPGA-based cryptographic applications. The proposed architecture integrates two discretized chaotic maps, Tent and Logistic, dynamically coupled through delayed feedback, with a ROPN module serving as the primary entropy source. The proposed TeLo-ROPN TRNG design was implemented on an Intel Cyclone V GT FPGA (5CGXFC9D6F27C7) and achieved near-ideal entropy, measuring 7.9991078 bits/byte in the AIS-31 T8 test and 7.963200bits/byte in the NIST SP 800-90B test. It successfully passed all NIST SP 800-22 statistical tests and demonstrated an energy efficiency of 16.97 pJ/bit at 300 MHz. The delayed chaotic interaction enhances resilience against modeling attacks, while the modular structure minimizes hardware overhead. These results demonstrate that TeLo-ROPN TRNG provides a high-throughput and energy-efficient solution for secure embedded and cryptographic systems.