Code generation with large language models has shown significant promise, especially when employing retrieval-augmented generation (RAG) with few-shot examples. However, selecting effective examples that enhance generation quality remains a challenging task, particularly when the target programming language (PL) is underrepresented. In this study, we present two key findings: (1) retrieving examples whose presented algorithmic plans can be referenced for generating the desired behavior significantly improves generation accuracy, and (2) converting code into pseudocode effectively captures such algorithmic plans, enhancing retrieval quality even when the source and the target PLs are different. Based on these findings, we propose Plan-as-query Example Retrieval for few-shot prompting in Code generation (PERC), a novel framework that utilizes algorithmic plans to identify and retrieve effective examples. We validate the effectiveness of PERC through extensive experiments on the CodeContests, HumanEval and MultiPL-E benchmarks: PERC consistently outperforms the state-of-the-art RAG methods in code generation, both when the source and target programming languages match or differ, highlighting its adaptability and robustness in diverse coding environments.

The apparel industry is increasingly adopting automation technologies and investing in research to address global reshoring efforts and rising labor costs. One essential process for automation in garment factories is top stitch, which involves sewing two fabric sheets together along a seam line while maintaining a consistent distance from it. This paper presents an automated top stitch system that retrofits a legacy machine using a vision-based macro-mini approach. The system mainly comprises a two-degree-of-freedom automatic sewing machine as the legacy machine, a vision sensor module, a mini-actuator module, and an infrared sensor module. The vision sensor module detects the seam line on the fabric, even in the presence of positional uncertainties, such as, human errors. The infrared sensor module monitors the sewing sequence, while the mini-actuator module operates simultaneously with the sewing machine to compensate for any misalignment. The system demonstrates improvements, with the average and the maximum errors reduced by 79% and 67%, respectively, and the standard deviation improved by 73%, compared to those from the operation without our system. To the best of our knowledge, this is the first development of an autonomous top stitch system using a retrofitted legacy machine, presenting a novel architecture that integrates sensors and actuators through a macro-mini approach.

This paper aims to extend the code generation capability of large language models (LLMs) to automatically manage comprehensive software requirements from given textual descriptions.Such requirements include both functional (i.e.achieving expected behavior for inputs) and non-functional (e.g., time/space performance, robustness, maintainability) requirements.However, textual descriptions can either express requirements verbosely or may even omit some of them.We introduce ARCHCODE, a novel framework that leverages in-context learning to organize requirements observed in descriptions and to extrapolate unexpressed requirements from them.ARCHCODE generates requirements from given descriptions, conditioning them to produce code snippets and test cases.Each test case is tailored to one of the requirements, allowing for the ranking of code snippets based on the compliance of their execution results with the requirements.Public benchmarks show that ARCHCODE enhances to satisfy functional requirements, significantly improving Pass@k scores.Furthermore, we introduce HumanEval-NFR, the first evaluation of LLMs' non-functional requirements in code generation, demonstrating ARCHCODE's superiority over baseline methods.The implementation of ARCHCODE and the HumanEval-NFR benchmark are both publicly accessible. 1 Index Generated Requirements Generated Code (manually validated) (validated by Ground Truth Test Cases) HumanEval-NFR/51 0 Correct Passed 1 Correct Passed 2 Correct Passed 3 Correct

A dynamic voltage scaling (DVS) enabled distributed digital low-dropout voltage regulator (LDO) is described. The proposed distributed LDO utilizes a multi-point average sensing to enable rapid and uniform output voltage regulation across a large-scale power grid, even during unbalanced load transients. A 16-bit thermometer-code flash analog-to-digital converter (FADC) combined with unary passgate configurations and an adaptive on-resistance (R$_{\mathrm {ON}}$) modulation is employed to ensure a small output voltage ripple during DVS operation, using only a small 13.4nF output capacitor. The proposed distributed LDO has been implemented in 28nm CMOS, achieves a 10.4A/mm2 current density, 99.96% current efficiency, and a 20.1ps FOM. It has also been tested under various unbalanced load transient conditions and can rapidly regulate the output voltage back to the target level.

An output-capacitor-free NMOS digital LDO (DLDO) using gate driving strength modulation (GDSM) is described. The proposed DLDO is mainly based on the time-driven topology while the GDSM changes the gate driving level adaptively according to the load current condition. The proposed GDSM lowers the gate driving level in the light load condition which improves the load transient response, widens the load current dynamic range, and reduces the output voltage ripple. A droop detector combined with the modulation scheme is also proposed to further improve the undershoot and recovery time. The proposed DLDO has been implemented in 28 nm CMOS and the 20,000$\times$load range is obtained even with 256 unity power switch arrays. When the load current changes from 5 mA to 85 mA, the$V_{OUT}$droop and recovery time are 130 mV and 2.5$\mu $s, which are 4.92$\times$and 70$\times$improvements compared to the baseline time-driven DLDO, respectively.