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Francisco Pimentel Torres

dblp:232/6240 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2019
0000-0003-0389-7856ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
1 paper
Hardware security and side channels · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
hardware verification and test
0.112019
IC Protection Against JTAG-Based Attacks · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2019
Electronic design automation › hardware verification and test › VLSI testing
manufacturing test
0.112019
IC Protection Against JTAG-Based Attacks · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2019

Methods — techniques the papers use, named apart from their topics

machine learning classification · 0.8feature extraction · 0.8
YearPublicationVenuePosition
2019 IC Protection Against JTAG-Based Attacks
abstract
Security is now becoming a well-established challenge for integrated circuits (ICs). Various types of IC attacks have been reported, including reverse engineering IPs, dumping on-chip data, and controlling/modifying IC operation. IEEE 1149.1, commonly known as Joint Test Action Group (JTAG), is a standard for providing test access to an IC. JTAG is primarily used for IC manufacturing test, but also for in-field debugging and failure analysis since it gives access to internal subsystems of the IC. Because the JTAG needs to be left intact and operational after fabrication, it inevitably provides a “backdoor” that can be exploited outside its intended use. This paper proposes machine learning-based approaches to detect illegitimate use of the JTAG. Specifically, JTAG operation is characterized using various features that are then classified as either legitimate or attack. Experiments using the OpenSPARC T2 platform demonstrate that the proposed approaches can classify legitimate JTAG operation and known attacks with significantly high accuracy. Experiments also demonstrate that unknown and disguised attacks can be detected with high accuracy as well (99% and 94%, respectively).
Xuanle Ren, Francisco Pimentel Torres, R. D. (Shawn) Blanton, Vítor Grade Tavares
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2