With feature size shrinking and design complexity increasing, detailed routing has become a crucial challenge in VLSI design. Although detailed routers have been proposed to judiciously handle hard-to-access pins and various design rules, their performances are sensitive to the order of nets to be routed, especially for those sequential routers with ripup-and-reroute scheme. In the published literature, net ordering strategies mainly rely on experts' knowledge to design heuristics to guarantee their performances. In this paper, we propose a novel transformer-based reinforcement learning framework for net ordering in detailed routing, aiming at automatically gaining failure/success routing experiences and building net order policies to guide detailed routing. Our experimental results show that our framework can effectively reduce the number of design rule violations and routing cost with comparable wirelength and via count, with comparison to state-of-the-art approaches.

As DSP is more and more widely used in the field of power electronics conversion, in order to enhance the comparability between the result of simulation and the experimental result of DSP control system, and increase the portability of the simulation program, it is very necessary to set up a fully digital power electronic simulation system based on imitating the working mechanism of DSP. This paper proposes a kind of the S-Function written all digital simulation method under MATLAB environment based on clock drive and interruption mechanism. This method uses the sampling time of S-Function module as clock cycle to achieve the simulation clock driving mechanism, and then establishes carrier and imitate EPWM interrupt mechanism of DSP to generate interrupt signal based on the clock drive, the program of the module works once when it gets the interrupt signal, at last imitates the working way of DSP regular sampling method and realizes the discrete event simulation. At the same time, some modules are common used, it can be used repeatedly and improve efficiency of simulation. Finally, it takes three-level converter modular all digital simulation as an example, and verifies the validity of the simulation method.