David I. Schuster

dblp:236/5661 · DBLP profile ↗
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6ranked-venue papers
0as first author
1since 2021 · last 2023
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 1 since 2021Software engineering, systems software and programming languages · 2 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
5 papers
Emerging computing paradigms · 100%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 10 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Emerging computing paradigms
quantum computer architecture
2.352023
Dancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures · ISCA 2023
Resource-Efficient Quantum Computing by Breaking Abstractions · Proc. IEEE 2020
Virtualized Logical Qubits: A 2.5D Architecture for Error-Corrected Quantum Computing · MICRO 2020
Emerging computing paradigms › quantum computer architecture
quantum compilation
1.432023
Dancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures · ISCA 2023
Partial Compilation of Variational Algorithms for Noisy Intermediate-Scale Quantum Machines · MICRO 2019
Optimized Compilation of Aggregated Instructions for Realistic Quantum Computers · ASPLOS 2019
Emerging computing paradigms › quantum computer architecture
fault-tolerant quantum computing
0.412020
Virtualized Logical Qubits: A 2.5D Architecture for Error-Corrected Quantum Computing · MICRO 2020
Emerging computing paradigms › quantum computer architecture
quantum error correction
0.412020
Resource-Efficient Quantum Computing by Breaking Abstractions · Proc. IEEE 2020
Emerging computing paradigms › quantum computer architecture › quantum software stack
quantum instruction set
0.412020
Resource-Efficient Quantum Computing by Breaking Abstractions · Proc. IEEE 2020
Emerging computing paradigms › quantum computer architecture
quantum software stack
0.412020
Resource-Efficient Quantum Computing by Breaking Abstractions · Proc. IEEE 2020
Emerging computing paradigms › quantum computer architecture › quantum error correction
surface code
0.412020
Virtualized Logical Qubits: A 2.5D Architecture for Error-Corrected Quantum Computing · MICRO 2020
Emerging computing paradigms
quantum computing
0.212023
Dancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures · ISCA 2023
Emerging computing paradigms › quantum computing
superconducting qubit
0.212023
Dancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures · ISCA 2023
Emerging computing paradigms › quantum computing
NISQ
0.112019
Partial Compilation of Variational Algorithms for Noisy Intermediate-Scale Quantum Machines · MICRO 2019

Methods — techniques the papers use, named apart from their topics

custom control pulse generation · 0.8commutative operation scheduling · 0.8qubit encoding · 0.7gate decomposition · 0.7simulation · 0.4quantum error correction · 0.4quantum compilation · 0.4embedding optimization · 0.4gradient descent pulse engineering · 0.4classical optimization · 0.4
YearPublicationVenuePosition
2023 Dancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures
abstract
Superconducting quantum devices are a leading technology for quantum computation, but they face several challenges. Gate errors, coherence errors and a lack of connectivity all contribute to low fidelity results. In particular, connectivity restrictions enforce a gate set that requires three-qubit gates to be decomposed into one- or two-qubit gates. This substantially increases the number of two-qubit gates that need to be executed. However, many quantum devices have access to higher energy levels. We can expand the qubit abstraction of |0〉 and |1〉 to a ququart which has access to the |2〉 and |3〉 state, but with shorter coherence times. This allows for two qubits to be encoded in one ququart, enabling increased virtual connectivity between physical units from two adjacent qubits to four fully connected qubits. This connectivity scheme allows us to more efficiently execute three-qubit gates natively between two physical devices.
Andrew Litteken, Lennart Maximilian Seifert, Jason Chadwick, Natalia Nottingham, Tanay Roy, David I. Schuster, Fred Chong, Jonathan M. Baker
ISCA7
2020 Memory-Equipped Quantum Architectures: The Power of Random Access
abstract
Resonant cavities can be used to extend conventional superconducting transmon-based quantum architectures by adding a few bits of quantum memory to each transmon. Such architectures leverage the long coherence times of cavities creating a "memory-equipped'' quantum architecture (MEQC) extending the amount of quantum state a machine can manipulate. However, random access to data will have the greatest effect on improving machine performance. Existing transmon architectures are locally connected and performing gates between distant qubits requires expensive pairwise swaps for execution. Added swap operations increase the probability of errors by increasing both operation count and execution time. We develop a complete compilation framework with heuristics to optimize for the load-store execution model of MEQC. We reduce the gate count and depth of compiled quantum programs by an average 1.62x and 1.70x, respectively compared to traditional transmon architectures. Based on small noise simulations, MEQC architectures outperform on programs as small as 10 qubits, and in general the probability of no gate errors, dominant in NISQ era, is greater on MEQC. If idle errors become more significant, MEQC will have a greater advantage. We conclude with an exploration of different architectural choices, such as transmon-transmon connectivity and cavity size, and explore their effect on the performance of the proposed architecture. While we expect due to small initial physical experiments that we have O(10) modes per cavity, the particular choice of cavity size in this 2.5D architecture is an important one. For example, when coherence times are high and we can withstand greater serialization it becomes more advantageous to favor larger cavity sizes. In the early stages of these devices, we expect transmon-transmon interactions to be potentially more expensive than transmon-cavity interactions. Our proposed solution can tolerate potentially up to 12x worse interconnect error.
Jonathan M. Baker, David I. Schuster, Fred Chong
PACT2
2020 Virtualized Logical Qubits: A 2.5D Architecture for Error-Corrected Quantum Computing
abstract
Current, near-term quantum devices have shown great progress in the last several years culminating recently with a demonstration of quantum supremacy. In the medium-term, however, quantum machines will need to transition to greater reliability through error correction, likely through promising techniques like surface codes which are well suited for near-term devices with limited qubit connectivity. We discover quantum memory, particularly resonant cavities with transmon qubits arranged in a 2.5D architecture, can efficiently implement surface codes with substantial hardware savings and performance/fidelity gains. Specifically, we virtualize logical qubits by storing them in layers of qubit memories connected to each transmon. Surprisingly, distributing each logical qubit across many memories has a minimal impact on fault tolerance and results in substantially more efficient operations. Our design permits fast transversal application of CNOT operations between logical qubits sharing the same physical address (same set of cavities) which are 6x faster than standard lattice surgery CNOTs. We develop a novel embedding which saves approximately 10x in transmons with another 2x savings from an additional optimization for compactness. Although qubit virtualization pays a 10x penalty in serialization, advantages in the transversal CNOT and in area efficiency result in fault-tolerance and performance comparable to conventional 2D transmon-only architectures. Our simulations show our system can achieve fault tolerance comparable to conventional two-dimensional grids while saving substantial hardware. Furthermore, our architecture can produce magic states at 1.22x the baseline rate given a fixed number of transmon qubits. This is a critical benchmark for future fault-tolerant quantum computers as magic states are essential and machines will spend the majority of their resources continuously producing them. This architecture substantially reduces the hardware requirements for fault-tolerant quantum computing and puts within reach a proof-of-concept experimental demonstration of around 10 logical qubits, requiring only 11 transmons and 9 attached cavities in total.
Casey Duckering, Jonathan M. Baker, David I. Schuster, Fred Chong
MICRO3
2020 Resource-Efficient Quantum Computing by Breaking Abstractions
abstract
Building a quantum computer that surpasses the computational power of its classical counterpart is a great engineering challenge. Quantum software optimizations can provide an accelerated pathway to the first generation of quantum computing (QC) applications that might save years of engineering effort. Current quantum software stacks follow a layered approach similar to the stack of classical computers, which was designed to manage the complexity. In this review, we point out that greater efficiency of QC systems can be achieved by breaking the abstractions between these layers. We review several works along this line, including two hardware-aware compilation optimizations that break the quantum instruction set architecture (ISA) abstraction and two error-correction/information-processing schemes that break the qubit abstraction. Last, we discuss several possible future directions.
Yunong Shi, Pranav Gokhale, Prakash Murali, Jonathan M. Baker, Casey Duckering, Yongshan Ding 0001, Natalie C. Brown, Christopher Chamberland, Ali Javadi-Abhari, Andrew W. Cross, David I. Schuster, Kenneth R. Brown, Margaret Martonosi, Fred Chong
Proc. IEEE11
2019 Optimized Compilation of Aggregated Instructions for Realistic Quantum Computers
abstract
Recent developments in engineering and algorithms have made real-world applications in quantum computing possible in the near future. Existing quantum programming languages and compilers use a quantum assembly language composed of 1- and 2-qubit (quantum bit) gates. Quantum compiler frameworks translate this quantum assembly to electric signals (called control pulses) that implement the specified computation on specific physical devices. However, there is a mismatch between the operations defined by the 1- and 2-qubit logical ISA and their underlying physical implementation, so the current practice of directly translating logical instructions into control pulses results in inefficient, high-latency programs. To address this inefficiency, we propose a universal quantum compilation methodology that aggregates multiple logical operations into larger units that manipulate up to 10 qubits at a time. Our methodology then optimizes these aggregates by (1) finding commutative intermediate operations that result in more efficient schedules and (2) creating custom control pulses optimized for the aggregate (instead of individual 1- and 2-qubit operations). Compared to the standard gate-based compilation, the proposed approach realizes a deeper vertical integration of high-level quantum software and low-level, physical quantum hardware. We evaluate our approach on important near-term quantum applications on simulations of superconducting quantum architectures. Our proposed approach provides a mean speedup of $5\times$, with a maximum of $10\times$. Because latency directly affects the feasibility of quantum computation, our results not only improve performance but also have the potential to enable quantum computation sooner than otherwise possible.
Yunong Shi, Nelson Leung 0002, Pranav Gokhale, Zane M. Rossi, David I. Schuster, Henry Hoffmann, Fred Chong
ASPLOS5
2019 Partial Compilation of Variational Algorithms for Noisy Intermediate-Scale Quantum Machines
abstract
Quantum computing is on the cusp of reality with Noisy Intermediate-Scale Quantum (NISQ) machines currently under development and testing. Some of the most promising algorithms for these machines are variational algorithms that employ classical optimization coupled with quantum hardware to evaluate the quality of each candidate solution. Recent work used GRadient Descent Pulse Engineering (GRAPE) to translate quantum programs into highly optimized machine control pulses, resulting in a significant reduction in the execution time of programs. This is critical, as quantum machines can barely support the execution of short programs before failing.
Pranav Gokhale, Yongshan Ding 0001, Thomas Propson, Christopher Winkler, Nelson Leung 0002, Yunong Shi, David I. Schuster, Henry Hoffmann, Fred Chong
MICRO7