VLDB 2026 Research / reviewers in the wild / expert
Jianxing Xu
dblp:240/2343
· DBLP profile ↗
6ranked-venue papers
2as first author
6since 2021 · last 2026
0000-0002-0373-411XORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 2 first-author · 4 since 2021Software engineering, systems software and programming languages · 3 · 1 first-author · 3 since 2021Artificial intelligence and machine learning · 1 · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | QiMeng-Tensify: Scaling Up Tensor Computation Optimization via Architecture-Aware LLM-Guided MCTS
Shouyang Dong, Jun Bi, Yuanbo Wen 0001, Xiyue Yu, Jianxing Xu, Guanglin Xu, Ling Li 0001, Xuehai Zhou, Tianshi Chen 0002, Qi Guo 0001 |
ISCA | 5 |
| 2026 | FlashAttention-T: Towards Fully Tensorized Attention by Exploiting Tensor-Vector ParallelismabstractThe attention mechanism is central to modern deep learning, particularly in large language models (LLMs), but suffers from quadratic computational complexity. To accelerate attention computation on GPUs, fused attention techniques (e.g., FlashAttention) consolidate the matrix multiplication (GEMM) and softmax computations into a single kernel. However, these operations remain computationally decoupled: the GEMM leverages high-performance tensor units (Tensor Cores), while the softmax executes on slower vector units (CUDA cores). This imbalance induces severe vector intervals—periods where tensor units sit idle awaiting vector unit completion—significantly underutilizing tensor units. Furthermore, ongoing hardware advancements delivering faster tensor units exacerbate this bottleneck. Jianxing Xu, Yuanbo Wen 0001, Jun Bi, Ruibai Xu, Guanglin Xu, Rui Zhang 0040, Wei Li 0008, Ling Li 0001, Tianshi Chen 0002, Qi Guo 0001, Yunji Chen |
PPoPP | 1 |
| 2025 | Mosaic: Exploiting Instruction-Level Parallelism on Deep Learning Accelerators with iTex TessellationabstractDeep learning has achieved great success in numerous application areas at the cost of high computational complexity. To meet the ever-increasing computational demand, commodity hardware platforms (e.g., CPUs and GPUs) offer abundant computing resources including scalar, vector, and tensor units for deep learning that could execute in parallel. However, existing top-down tiling-based deep learning compilers often generate a homogeneous mapping from the given tensor computation task to hardware arithmetic instructions, failing to utilize different computing units simultaneously to achieve higher performance. Jianxing Xu, Yuanbo Wen 0001, Ruibai Xu, Tingfeng Ruan, Jun Bi, Rui Zhang 0040, Xinkai Song, Yifan Hao 0001, Xing Hu 0001, Zidong Du, Chongqing Zhao, Jiang Jie, Qi Guo 0001 |
ASPLOS (2) | 1 |
| 2025 | QiMeng-Xpiler: Transcompiling Tensor Programs for Deep Learning Systems with a Neural-Symbolic Approach
Shouyang Dong, Jun Bi, Jiaming Guo, Jianxing Xu, Ruibai Xu, Xinkai Song, Yifan Hao 0001, Ling Li 0001, Xuehai Zhou, Tianshi Chen 0002, Qi Guo 0001, Yunji Chen |
OSDI | 5 |
| 2022 | BabelTower: Learning to Auto-parallelized Program TranslationabstractGPUs have become the dominant computing platforms for many applications, while programming GPUs with the widely-used CUDA parallel programming model is difficult. As sequential C code is relatively easy to obtain either from legacy repositories or by manual implementation, automatically translating C to its parallel CUDA counterpart is promising to relieve the burden of GPU programming. However, because of huge differences between the sequential C and the parallel CUDA programming model, existing approaches fail to conduct the challenging auto-parallelized program translation. In this paper, we propose a learning-based framework, i.e., BabelTower, to address this problem. We first create a large-scale dataset consisting of compute-intensive function-level monolingual corpora. We further propose using back-translation with a discriminative reranker to cope with unpaired corpora and parallel semantic conversion. Experimental results show that BabelTower outperforms state-of-the-art by 1.79, 6.09, and 9.39 in terms of BLEU, CodeBLEU, and specifically designed ParaBLEU, respectively. The CUDA code generated by BabelTower attains a speedup of up to 347x over the sequential C code, and the developer productivity is improved by at most 3.8x. Yuanbo Wen 0001, Qi Guo 0001, Xiaqing Li, Jianxing Xu, Yanlin Tang, Yongwei Zhao 0001, Xing Hu 0001, Zidong Du, Ling Li 0001, Chao Wang 0003, Xuehai Zhou, Yunji Chen |
ICML | 5 |
| 2022 | Enabling One-Size-Fits-All Compilation Optimization for Inference Across Machine Learning ComputersabstractMachine Learning Computers (MLCs) with tensor functional units (e.g., NVIDIA's Tensor Core, Google's TPU and Habana's Tensor Processor Core) have emerged significantly over recent years. The broad diversity of MLCs makes it hard to deploy machine learning workloads with optimized performance. Though deep learning compilers (e.g., TVM) are effective to produce optimized code for different hardware back-ends, when deploying to a new MLC, it is tedious to implement platform-specific compilation optimizations by thoroughly understanding system/architectural details. To address this problem, we propose a holistic approach to achieve one-size-fits-all compilation optimization across different MLCs or inference. The key observation is that diverse MLCs share multiple key architectural characteristics for tensor processing, which can be generalized for conducting cross-platform compilation optimizations. Concretely, we propose the Tensor Abstract Machine (TAM), which features such common architectural characteristics, as the abstraction of a broad range of MLCs. To leverage architectural characteristics of the TAM, we propose the Tensor Scheduling Language (TSL) consisting of tensor computation description and tensor scheduling primitives for implementing operations with portable optimization. Experimental results demonstrate that the code generated from the same optimization schedule achieves 1.05x to 2.05x better performance than hand-tuned libraries and deep learning compilers across different platforms. Yuanbo Wen 0001, Qi Guo 0001, Zidong Du, Jianxing Xu, Xing Hu 0001, Wei Li 0008, Rui Zhang 0040, Chao Wang 0003, Xuehai Zhou, Tianshi Chen 0002 |
IEEE Trans. Computers | 4 |