Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Guojing Tian

dblp:244/2795 · DBLP profile ↗
← Back
2ranked-venue papers
0as first author
2since 2021 · last 2023
0000-0001-5702-1142ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 1 · 1 since 2021Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Emerging computing paradigms · 100%
Theoretical computer science
1 paper
Computational complexity · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Emerging computing paradigms › quantum computer architecture
quantum circuit synthesis
0.712023
Asymptotically Optimal Circuit Depth for Quantum State Preparation and General Unitary Synthesis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023
Emerging computing paradigms
quantum computer architecture
0.712023
Asymptotically Optimal Circuit Depth for Quantum State Preparation and General Unitary Synthesis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023
Emerging computing paradigms › quantum computer architecture › quantum circuit synthesis
quantum state preparation
0.712023
Asymptotically Optimal Circuit Depth for Quantum State Preparation and General Unitary Synthesis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023
Computational complexity › circuit complexity
circuit depth
0.712023
Asymptotically Optimal Circuit Depth for Quantum State Preparation and General Unitary Synthesis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023

Methods — techniques the papers use, named apart from their topics

ancillary qubits · 1.3time-space tradeoffs · 0.7time-space trade-off · 0.7
YearPublicationVenuePosition
2023 BF-QC: Belief functions on quantum circuits
Qianli Zhou, Guojing Tian, Yong Deng 0001
Expert Syst. Appl.2
2023 Asymptotically Optimal Circuit Depth for Quantum State Preparation and General Unitary Synthesis
abstract
The Quantum State Preparation problem aims to prepare an n-qubit quantum state |ψv=k=02n-1vk|k from the initial state |0n, for a given unit vector v=(v0,v1,v2,v2n-1)TC2n with ||v||2=1. The problem is of fundamental importance in quantum algorithm design, Hamiltonian simulation and quantum machine learning, yet its circuit depth complexity remains open when ancillary qubits are available. In this paper, we study quantum circuits when there are m ancillary qubits available. We construct, for any m, circuits that can prepare |ψvin depth Õ(2nm+n+n) and size O(2n), achieving the optimal value for both measures simultaneously. These results also imply a depth complexity of (4nm+n) for quantum circuits implementing a general n-qubit unitary for any m≤O(2n/n) number of ancillary qubits. This resolves the depth complexity for circuits without ancillary qubits. And for circuits with exponentially many ancillary qubits, our result quadratically improves the currently best upper bound of O(4n) to ˜(2n). Our circuits are deterministic, prepare the state and carry out the unitary precisely, utilize the ancillary qubits tightly and the depths are optimal in a wide parameter regime. The results can be viewed as (optimal) time-space trade-off bounds, which is not only theoretically interesting, but also practically relevant in the current trend that the number of qubits starts to take off, by showing a way to use a large number of qubits to compensate the short qubit lifetime.
Xiaoming Sun 0001, Guojing Tian, Pei Yuan, Shengyu Zhang 0002
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2