VLDB 2026 Research / reviewers in the wild / expert
Erfan Sharafzadeh
dblp:246/9146
· DBLP profile ↗
7ranked-venue papers
3as first author
5since 2021 · last 2025
0000-0002-2529-5381ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 5 · 3 first-author · 5 since 2021Systems, architecture and hardware · 2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | One to Many: Closing the Bandwidth Gap in AI Datacenters with Scalable MulticastabstractAI training now floods datacenter fabrics with thousands of simultaneous collectives, yet most frameworks still move data the hard way: O(N) unicasts for a group of N processors. Classic multicast could slash those bytes but has long been deemed unscalable: computing an optimal tree in an asymmetric Clos is NP-hard and group-specific rules quickly exhaust switch TCAM. Sepehr Abdous, Jinqi Lu, Jiacheng Wan, Erfan Sharafzadeh, Ying Zhang 0022, Soudeh Ghorbani |
HotNets | 4 |
| 2025 | Self-Clocked Round-Robin Packet Scheduling
Erfan Sharafzadeh, Raymond Matson, Jean Tourrilhes, Puneet Sharma 0001, Soudeh Ghorbani |
NSDI | 1 |
| 2023 | Understanding the impact of host networking elements on traffic bursts
Erfan Sharafzadeh, Sepehr Abdous, Soudeh Ghorbani |
NSDI | 1 |
| 2021 | Burst-tolerant datacenter networks with VertigoabstractMicrosecond-scale congestion events, known as microbursts, are a main cause of packet loss and poor application performance in today's datacenters. Given the low network utilization in datacenters, one would expect packet deflection, in-situ re-routing of packets that arrive at a full buffer to a different port, to effectively prevent packet loss. However, if deployed naively, deflection leads to excessive packet re-ordering, exacerbated congestion, and head-of-the-line blocking in switch buffers. In this study, we resolve the above challenges by selectively deflecting the packets that cause persistent congestion in the network. To enable this, we augment the end-host network stacks with a transport-independent extension that tracks and marks flows with their remaining bytes. Our in-network deflection component uses the flow size information to re-route packets from flows with more data to send. Finally, an extension to the receive-side of end-host stacks retrieves the correct ordering of packets before passing them to transport and higherlevel protocols. We evaluate our design, Vertigo, under diverse datacenter workloads and show that it is effective in managing microbursts under light and heavy loads and when combined with various congestion control algorithms. For example, in a leaf-spine network under 85% load, Vertigo reduces the mean incast query completion times by 3.5x, 3.3x, 5x compared to ECMP, DRILL, and DIBS when using TCP, 3x, 3.5x, 4.5x alongside DCTCP, and 43x, 33x, 16x when using Swift, respectively. Sepehr Abdous, Erfan Sharafzadeh, Soudeh Ghorbani |
CoNEXT | 2 |
| 2021 | A high-resolution study of data center traffic at its origin
Erfan Sharafzadeh, Soudeh Ghorbani |
CoNEXT | 1 |
| 2020 | Peafowl: in-application CPU scheduling to reduce power consumption of in-memory key-value storesabstractThe traffic load sent to key-value (KV) stores varies over long timescales of hours to short timescales of a few microseconds. Long-term variations present the opportunity to save power during low or medium periods of utilization. Several techniques exist to save power in servers, including feedback-based controllers that right-size the number of allocated CPU cores, dynamic voltage and frequency scaling (DVFS), and c-state (idle-state) mechanisms. In this paper, we demonstrate that existing power saving techniques are not effective for KV stores. This is because the high rate of traffic even under low load prevents the system from entering low power states for extended periods of time. To achieve power savings, we must unbalance the load among the CPU cores so that some of them can enter low power states during periods of low load. We accomplish this by introducing the notion of in-application CPU scheduling. Instead of relying on the kernel to schedule threads, we pin threads to bypass the kernel CPU scheduler and then perform the scheduling within the KV store application. Our design, Peafowl, is a KV store that features an in-application CPU scheduler that monitors the load to learn the workload characteristics and then scales the number of active CPU cores when the load drops, leading to notable power savings during low or medium periods of utilization. Our experiments demonstrate that Peafowl uses up to 40--54% lower power than state of the art approaches such as Rubik and μDPM. Esmail Asyabi, Azer Bestavros, Erfan Sharafzadeh, Timothy Zhu |
SoCC | 3 |
| 2019 | CTS: An operating system CPU scheduler to mitigate tail latency for latency-sensitive multi-threaded applications
Esmail Asyabi, Erfan Sharafzadeh, Seyed Alireza Sanaee Kohroudi, Mohsen Sharifi |
J. Parallel Distributed Comput. | 2 |