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Navnit Kumar

dblp:247/9935 · DBLP profile ↗
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3ranked-venue papers
3as first author
3since 2021 · last 2026
0000-0001-7024-3989ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 first-author · 3 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 87% Emerging computing paradigms · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
analog and mixed-signal circuits
1.012026
An Electronically Tunable Dual Flux-Controlled Floating Memristor Emulator · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026
Integrated circuit design › analog and mixed-signal circuits
memristor emulator
1.012026
An Electronically Tunable Dual Flux-Controlled Floating Memristor Emulator · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026
Emerging computing paradigms
neuromorphic computing
0.312026
An Electronically Tunable Dual Flux-Controlled Floating Memristor Emulator · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026

Methods — techniques the papers use, named apart from their topics

SPICE simulation · 1.0CCDDCC · 1.0
YearPublicationVenuePosition
2026 An Electronically Tunable Dual Flux-Controlled Floating Memristor Emulator
abstract
In recent years, memristor emulators have been utilized in a wide range of applications including neuromorphic computing, security, analog signal processing, and other related fields. This article introduces a novel electronically tunable dual flux controlled floating memristor emulator employing single Current Controlled Differential Difference Current Conveyor (CCDDCC), a MOS capacitor, and one PMOS transistor. The core of the suggested emulator features an electronically tunable CCDDCC-based feedback circuit. The proposed circuit avoids passive components, diodes, and analog multiplier circuits. The suggested memristor has the ability to tune the area of the pinch hysteresis loop without altering the input frequency, input voltage, MOS capacitance, and active component. The circuit operates effectively within a 300 MHz frequency range and demonstrates a well-defined pinched hysteresis loop. Its performance is evaluated using 180 nm TSMC parameters, with a compact layout area of 758.12 μm². Additionally, the robustness of the circuit is thoroughly assessed through analyses of temperature variations, supply voltage fluctuations, transistor size variations, and process corner simulations.
Navnit Kumar, Neeta Pandey, Manjeet Kumar, Shahram Minaei
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2023 Electronically tunable positive and negative fractional order inductor circuit using single topology
Navnit Kumar, Manjeet Kumar, Neeta Pandey
Integr.1
2023 CCTA based four different pairs of mutually coupled circuit using single topology
Navnit Kumar, Manjeet Kumar, Neeta Pandey
Integr.1