Yasmin Sarita

dblp:251/2055 · DBLP profile ↗
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5ranked-venue papers
1as first author
4since 2021 · last 2026
0009-0002-1491-3348ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 4 · 1 first-author · 3 since 2021Systems, architecture and hardware · 1 · 1 since 2021
YearPublicationVenuePosition
2026 Efficient Ranking Function-Based Termination Analysis via Bidirectional Decompositional Search
Yasmin Sarita, Avaljot Singh, Shaurya Gomber, Gagandeep Singh 0001, Mahesh Vishwanathan
ESOP (2)1
2025 Automated Verification of Soundness of DNN Certifiers
abstract
The uninterpretability of Deep Neural Networks (DNNs) hinders their use in safety-critical applications. Abstract Interpretation-based DNN certifiers provide promising avenues for building trust in DNNs. Unsoundness in the mathematical logic of these certifiers can lead to incorrect results. However, current approaches to ensure their soundness rely on manual, expert-driven proofs that are tedious to develop, limiting the speed of developing new certifiers. Automating the verification process is challenging due to the complexity of verifying certifiers for arbitrary DNN architectures and handling diverse abstract analyses. We introduce ProveSound , a novel verification procedure that automates the soundness verification of DNN certifiers for arbitrary DNN architectures. Our core contribution is the novel concept of a symbolic DNN, using which, ProveSound reduces the soundness property, a universal quantification over arbitrary DNNs, to a tractable symbolic representation, enabling verification with standard SMT solvers. By formalizing the syntax and operational semantics of ConstraintFlow , a DSL for specifying certifiers, ProveSound efficiently verifies both existing and new certifiers, handling arbitrary DNN architectures. Our code is available at https://github.com/uiuc-focal-lab/constraintflow.git
Avaljot Singh, Yasmin Sarita, Charith Mendis, Gagandeep Singh 0001
Proc. ACM Program. Lang.2
2024 ConstraintFlow: A Declarative DSL for Easy Development of DNN Certifiers
Avaljot Singh, Yasmin Sarita, Charith Mendis, Gagandeep Singh 0001
SAS2
2021 ApproxTuner: a compiler and runtime system for adaptive approximations
abstract
Manually optimizing the tradeoffs between accuracy, performance and energy for resource-intensive applications with flexible accuracy or precision requirements is extremely difficult. We present ApproxTuner, an automatic framework for accuracy-aware optimization of tensor-based applications while requiring only high-level end-to-end quality specifications. ApproxTuner implements and manages approximations in algorithms, system software, and hardware.
Hashim Sharif, Yifan Zhao 0004, Maria Kotsifakou, Akash Kothari, Benjamin Schreiber 0001, Elizabeth Wang, Yasmin Sarita, Nathan Zhao, Keyur Joshi 0001, Vikram S. Adve, Sasa Misailovic, Sarita V. Adve
PPoPP7
2019 ApproxHPVM: a portable compiler IR for accuracy-aware optimizations
abstract
We propose ApproxHPVM, a compiler IR and system designed to enable accuracy-aware performance and energy tuning on heterogeneous systems with multiple compute units and approximation methods. ApproxHPVM automatically translates end-to-end application-level quality metrics into accuracy requirements for individual operations. ApproxHPVM uses a hardware-agnostic accuracy-tuning phase to do this translation that provides greater portability across heterogeneous hardware platforms and enables future capabilities like accuracy-aware dynamic scheduling and design space exploration. ApproxHPVM incorporates three main components: (a) a compiler IR with hardware-agnostic approximation metrics, (b) a hardware-agnostic accuracy-tuning phase to identify error-tolerant computations, and (c) an accuracy-aware hardware scheduler that maps error-tolerant computations to approximate hardware components. As ApproxHPVM does not incorporate any hardware-specific knowledge as part of the IR, it can serve as a portable virtual ISA that can be shipped to all kinds of hardware platforms. We evaluate our framework on nine benchmarks from the deep learning domain and five image processing benchmarks. Our results show that our framework can offload chunks of approximable computations to special-purpose accelerators that provide significant gains in performance and energy, while staying within user-specified application-level quality metrics with high probability. Across the 14 benchmarks, we observe from 1-9x performance speedups and 1.1-11.3x energy reduction for very small reductions in accuracy.
Hashim Sharif, Prakalp Srivastava, Muhammad Huzaifa, Maria Kotsifakou, Keyur Joshi 0001, Yasmin Sarita, Nathan Zhao, Vikram S. Adve, Sasa Misailovic, Sarita V. Adve
Proc. ACM Program. Lang.6