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Alvin Y. Sukmadji

dblp:255/0693 · DBLP profile ↗
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2ranked-venue papers
1as first author
2since 2021 · last 2025
0000-0002-5383-037XORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 1 · 1 first-author · 1 since 2021Theory of computation · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Theoretical computer science
2 papers
Coding theory · 84% Combinatorics and discrete mathematics · 16%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Coding theory › sequences › sequence design
difference triangle sets
0.912025
Higher-Order Staircase Codes · IEEE Trans. Inf. Theory 2025
Coding theory › error-correcting codes › block codes › product codes
staircase codes
0.912025
Higher-Order Staircase Codes · IEEE Trans. Inf. Theory 2025
Coding theory › error-correcting codes › cyclic codes
BCH and Reed-Solomon codes
0.812024
Performance-Complexity-Latency Trade-Offs of Concatenated RS-BCH Codes · IEEE Trans. Commun. 2024
Coding theory › error-correcting codes
concatenated codes
0.812024
Performance-Complexity-Latency Trade-Offs of Concatenated RS-BCH Codes · IEEE Trans. Commun. 2024
Coding theory › error-correcting codes › error probability analysis
frame error rate
0.812024
Performance-Complexity-Latency Trade-Offs of Concatenated RS-BCH Codes · IEEE Trans. Commun. 2024
Combinatorics and discrete mathematics
generating functions
0.812024
Performance-Complexity-Latency Trade-Offs of Concatenated RS-BCH Codes · IEEE Trans. Commun. 2024

Methods — techniques the papers use, named apart from their topics

iterative syndrome-domain decoding · 0.9coupled hamming component codes · 0.9pareto frontier · 0.8monte carlo simulation · 0.8generating functions · 0.8
YearPublicationVenuePosition
2025 Higher-Order Staircase Codes
abstract
We generalize staircase codes and tiled diagonal zipper codes, preserving their key properties while allowing each coded symbol to be protected by arbitrarily many component codewords rather than only two. This generalization which we term “higher-order staircase codes” arises from the marriage of two distinct combinatorial objects: difference triangle sets and finite-geometric nets, which have typically been applied separately to code design. We demonstrate one possible realization of these codes, obtaining powerful, high-rate, low-error-floor, and low-complexity coding schemes based on simple iterative syndrome-domain decoding of coupled Hamming component codes. We anticipate that the proposed codes could improve performance–complexity–latency tradeoffs in high-throughput communications applications, most notably fiber-optic, in which classical staircase codes and zipper codes have been applied. We consider the construction of difference triangle sets having minimum scope and sum-of-lengths, which lead to memory-optimal realizations of higher-order staircase codes. These results also enable memory reductions for early families of convolutional codes constructed from difference triangle sets.
Mohannad Shehadeh, Frank R. Kschischang, Alvin Y. Sukmadji, William Kingsford
IEEE Trans. Inf. Theory3
2024 Performance-Complexity-Latency Trade-Offs of Concatenated RS-BCH Codes
abstract
Using a generating function approach, a computationally tractable expression is derived to predict the frame error rate arising at the output of the binary symmetric channel when a number of outer Reed–Solomon codes are concatenated with a number of inner Bose–Ray-Chaudhuri–Hocquenghem codes, thereby obviating the need for time-consuming Monte Carlo simulations. Measuring (a) code performance via the gap to the Shannon limit, (b) decoding complexity via an estimate of the number of operations per decoded bit, and (c) decoding latency by the overall frame length, a code search is performed to determine the Pareto frontier for performance-complexity-latency trade-offs.
Alvin Y. Sukmadji, Frank R. Kschischang
IEEE Trans. Commun.1