Demo Data from VLDB 2026 / reviewers in the wild / expert
Tianren Gao
dblp:256/5127
· DBLP profile ↗
3ranked-venue papers
0as first author
3since 2021 · last 2024
0009-0006-5144-5183ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 1 · 1 since 2021Systems, architecture and hardware · 1 · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 38% Memory systems · 38% Reconfigurable computing and FPGAs · 12% | |
| Artificial intelligence
1 paper |
Transfer learning and domain adaptation · 44% Vision and language · 44% Efficient and distributed learning · 13% |
Topics — the 5 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware accelerators and domain-specific architectures
machine learning accelerator |
0.8 | 1 | 2024 | SambaNova SN40L: Scaling the AI Memory Wall with Dataflow and Composition of Experts · MICRO 2024 |
Memory systems
memory hierarchy |
0.8 | 1 | 2024 | SambaNova SN40L: Scaling the AI Memory Wall with Dataflow and Composition of Experts · MICRO 2024 |
Computer vision › Vision and language › cross-modal supervision
language-supervised learning |
0.6 | 1 | 2022 | Data Efficient Language-Supervised Zero-Shot Recognition with Optimal Transport Distillation · ICLR 2022 |
Machine learning › Transfer learning and domain adaptation › zero-shot learning
zero-shot classification |
0.6 | 1 | 2022 | Data Efficient Language-Supervised Zero-Shot Recognition with Optimal Transport Distillation · ICLR 2022 |
Reconfigurable computing and FPGAs › reconfigurable computing
reconfigurable dataflow |
0.2 | 1 | 2024 | SambaNova SN40L: Scaling the AI Memory Wall with Dataflow and Composition of Experts · MICRO 2024 |
Methods — techniques the papers use, named apart from their topics
streaming dataflow · 0.8expert composition · 0.8optimal transport · 0.6knowledge distillation · 0.6
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | SambaNova SN40L: Scaling the AI Memory Wall with Dataflow and Composition of ExpertsabstractMonolithic large language models (LLMs) like GPT-4 have paved the way for modern generative AI applications. Training, serving, and maintaining monolithic LLMs at scale, however, remains prohibitively expensive and challenging. The disproportionate increase in compute-to-memory ratio of modern AI accelerators have created a memory wall, necessitating new methods to deploy AI. Recent research has shown that a composition of many smaller expert models, each with several orders of magnitude fewer parameters, can match or exceed the capabilities of monolithic LLMs. Composition of Experts (CoE) is a modular approach that lowers the cost and complexity of training and serving. However, this approach presents two key challenges when using conventional hardware: (1) without fused operations, smaller models have lower operational intensity, which makes high utilization more challenging to achieve; and (2) hosting a large number of models can be either prohibitively expensive or slow when dynamically switching between them. In this paper, we describe how combining CoE, streaming dataflow, and a three-tier memory system scales the AI memory wall. We describe Samba-CoE, a CoE system with 150 experts and a trillion total parameters. We deploy Samba-CoE on the SambaNova SN40L Reconfigurable Dataflow Unit (RDU) -a commercial dataflow accelerator architecture that has been codesigned for enterprise inference and training applications. The chip introduces a new three-tier memory system with on-chip distributed SRAM, on-package HBM, and off-package DDR DRAM. A dedicated inter-RDU network enables scaling up and out over multiple sockets. We demonstrate speedups ranging from 2× to 13× on various benchmarks running on eight RDU sockets compared with an unfused baseline. We show that for CoE inference deployments, the 8-socket RDU Node reduces machine footprint by up to 19 ×, speeds up model switching time by 15× to 31×, and achieves an overall speedup of 3.7× over a DGX H100 and 6.6× over a DGX A100. Raghu Prabhakar, Ram Sivaramakrishnan, Darshan Gandhi, Mingran Wang, Kejie Zhang, Tianren Gao, Angela Wang, Yongning Sheng, Joshua Brot, Denis Sokolov, Apurv Vivek, Calvin Leung, Arjun Sabnis, Jiayu Bai, Tuowen Zhao, Mark Gottscho, Mark Luttrell, Manish K. Shah, Zhengyu Chen 0002, Kaizhao Liang, Swayambhoo Jain, Urmish Thakker, Dawei Huang, Sumti Jairath, Kevin J. Brown, Kunle Olukotun |
MICRO | 8 |
| 2022 | Integer-Only Zero-Shot Quantization for Efficient Speech RecognitionabstractEnd-to-end neural network models achieve improved performance on various automatic speech recognition (ASR) tasks. However, these models perform poorly on edge hardware due to large memory and computation requirements. While quantizing model weights and/or activations to low-precision can be a promising solution, previous research on quantizing ASR models is limited. In particular, the previous approaches use floating-point arithmetic during inference and thus they cannot fully exploit efficient integer processing units. Moreover, they require training and/or validation data during quantization, which may not be available due to security or privacy concerns. To address these limitations, we propose an integer-only, zeroshot quantization scheme for ASR models. In particular, we generate synthetic data whose runtime statistics resemble the real data, and we use it to calibrate models during quantization. We apply our method to quantize QuartzNet, Jasper, and Conformer and show negligible WER degradation as compared to the full-precision baseline models, even without using any data. Moreover, we achieve up to 2.35× speedup on a T4 GPU and 4× compression rate, with a modest WER degradation of <1% with INT8 quantization. Sehoon Kim 0001, Amir Gholami, Zhewei Yao, Nicholas Lee, Aniruddha Nrusimha, Bohan Zhai, Tianren Gao, Michael W. Mahoney, Kurt Keutzer |
ICASSP | 8 |
| 2022 | Data Efficient Language-Supervised Zero-Shot Recognition with Optimal Transport Distillation
Bichen Wu, Ruizhe Cheng, Peizhao Zhang, Tianren Gao, Joseph Gonzalez 0001, Peter Vajda |
ICLR | 4 |