VLDB 2026 Research / reviewers in the wild / expert
Javier A. Riquelme
dblp:256/5275
· DBLP profile ↗
2ranked-venue papers
0as first author
2since 2021 · last 2022
0000-0001-5389-2207ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
GPUs and heterogeneous computing · 77% Parallel and multicore computing · 23% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
GPUs and heterogeneous computing › GPU architecture
GPU tensor cores |
0.5 | 1 | 2021 | GPU Tensor Cores for Fast Arithmetic Reductions · IEEE Trans. Parallel Distributed Syst. 2021 |
Parallel and multicore computing › parallel algorithms › parallel primitives
parallel reduction |
0.1 | 1 | 2021 | GPU Tensor Cores for Fast Arithmetic Reductions · IEEE Trans. Parallel Distributed Syst. 2021 |
Methods — techniques the papers use, named apart from their topics
matrix-multiply accumulate operations · 0.5
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | Fast kNN query processing over a multi-node GPU environment
Ricardo J. Barrientos, Javier A. Riquelme, Ruber Hernández-García, Cristóbal A. Navarro, Wladimir E. Soto-Silva |
J. Supercomput. | 2 |
| 2021 | GPU Tensor Cores for Fast Arithmetic ReductionsabstractThis article proposes a parallel algorithm for computing the arithmetic reduction of n numbers as a set of matrix-multiply accumulate (MMA) operations that are executed simultaneously by GPU tensor cores. The analysis, assuming tensors of size m x m, shows that the proposed algorithm has a parallel running time of T(n) = 5logm2n and a speedup of S = 45log2m2 over a canonical parallel reduction. Experimental performance results on a Tesla V100 GPU show that the tensor-core based approach is energy efficient and runs up to ~ 3:2× and 2× faster than a standard GPU-based reduction and Nvidia's CUB library, respectively, while keeping the numerical error below 1 percent with respect to a double precision CPU reduction. The chained design of the algorithm allows a flexible configuration of GPU thread-blocks and the optimal values found through experimentation agree with the theoretical ones. The results obtained in this work show that GPU tensor cores are relevant not only for Deep Learning or Linear Algebra computations, but also for applications that require the acceleration of large summations. Cristóbal A. Navarro, Roberto Carrasco, Ricardo J. Barrientos, Javier A. Riquelme, Raimundo Vega |
IEEE Trans. Parallel Distributed Syst. | 4 |