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Natsuhiko Futamura

dblp:26/5804 · DBLP profile ↗
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9ranked-venue papers
3as first author
0since 2021 · last 2005
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 2 first-authorComputer networks · 2 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
1 paper
Routing and switching · 91% Internet architecture and protocols · 9%
Interdisciplinary, comprehensive, and emerging computing
1 paper
Bioinformatics and computational biology · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 100%
Theoretical computer science
1 paper
Algorithms and data structures · 100%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Routing and switching
IP lookup
0.112005
Scalable, memory efficient, high-speed IP lookup algorithms · IEEE/ACM Trans. Netw. 2005
Routing and switching › IP lookup
longest prefix matching
0.112005
Scalable, memory efficient, high-speed IP lookup algorithms · IEEE/ACM Trans. Netw. 2005
Routing and switching
router architecture
0.112005
Scalable, memory efficient, high-speed IP lookup algorithms · IEEE/ACM Trans. Netw. 2005
Bioinformatics and computational biology
protein structure analysis
0.012002
Efficient Parallel Algorithms for Solvent Accessible Surface Area of Proteins · IEEE Trans. Parallel Distributed Syst. 2002
Bioinformatics and computational biology › protein structure analysis › protein surface analysis
solvent accessible surface
0.012002
Efficient Parallel Algorithms for Solvent Accessible Surface Area of Proteins · IEEE Trans. Parallel Distributed Syst. 2002
Parallel and multicore computing
parallel algorithms
0.012002
Efficient Parallel Algorithms for Solvent Accessible Surface Area of Proteins · IEEE Trans. Parallel Distributed Syst. 2002
Internet architecture and protocols
IPv6
0.012005
Scalable, memory efficient, high-speed IP lookup algorithms · IEEE/ACM Trans. Netw. 2005
Algorithms and data structures › randomized algorithms
monte carlo methods
0.012002
Efficient Parallel Algorithms for Solvent Accessible Surface Area of Proteins · IEEE Trans. Parallel Distributed Syst. 2002

Methods — techniques the papers use, named apart from their topics

sorting · 0.1monte carlo · 0.1hashing · 0.1trie-based data structure · 0.1
YearPublicationVenuePosition
2005 Parallel algorithms for tree accumulations
Fatih Erdogan Sevilgen, Srinivas Aluru, Natsuhiko Futamura
J. Parallel Distributed Comput.3
2005 Scalable, memory efficient, high-speed IP lookup algorithms
abstract
One of the central issues in router performance is IP address lookup based on longest prefix matching. IP address lookup algorithms can be evaluated on a number of metrics-lookup time, update time, memory usage, and to a less important extent, the time to construct the data structure used to support lookups and updates. Many of the existing methods are geared toward optimizing a specific metric, and do not scale well with the ever expanding routing tables and the forthcoming IPv6 where the IP addresses are 128 bits long. In contrast, our effort is directed at simultaneously optimizing multiple metrics and provide solutions that scale to IPv6, with its longer addresses and much larger routing tables. In this paper, we present two IP address lookup schemes-Elevator-Stairs algorithm and logW-Elevators algorithm. For a routing table with N prefixes, The Elevator-Stairs algorithm uses optimal O(N) memory, and achieves better lookup and update times than other methods with similar memory requirements. The logW-Elevators algorithm gives O(logW) lookup time, where W is the length of an IP address, while improving upon update time and memory usage. Experimental results using the MAE-West router with 29 487 prefixes show that the Elevator-Stairs algorithm gives an average throughput of 15.7 Million lookups per second (Mlps) using 459KB of memory, and the logW-Elevators algorithm gives an average throughput of 21.41Mlps with a memory usage of 1259KB.
Rama Sangireddy, Natsuhiko Futamura, Srinivas Aluru, Arun K. Somani
IEEE/ACM Trans. Netw.2
2004 Indexing Genomic Databases
abstract
Current biological sequence comparison tools utilize full database searches to find approximate matches between a database and a query. A new approach to sequence comparisons can be performed by indexing the database using a novel indexing scheme. An indexed scheme can immediately eliminate highly mismatched sequences thereby improving performance and accuracy. iBlast is proposed as an indexed version of BLAST. In its initial implementation, iBlast uses a sequence-based index to catalog genomic databases in an NCR Teradata RDBMS. Several types of indexes and querying methods are explored to determine the most efficient solution utilizing the parallel nature of the Teradata system. Significant speedups were obtained and are explained in further detail in this paper. Future indexing methods based on prokaryotic and eukaryotic genome structures are also proposed.
Gina Cooper, Michael L. Raymer, Travis E. Doom, Dan E. Krane, Natsuhiko Futamura
BIBE5
2003 Scalable, memory efficient, high-speed lookup and update algorithms for IP routing
abstract
IP address lookup algorithms can be evaluated on a number of metrics lookup time, update time, memory usage, and to a lesser extent, the time to construct the data structure used to support lookups and updates. Many of the existing methods are geared towards optimizing a specific metric, and hence do not scale well with the ever expanding routing tables and the forthcoming IPv6 with 128 bit long IP address. In contrast, our effort is directed at simultaneously optimizing multiple metrics and provide solutions that scale well to IPv6. In this paper, we present two IP address lookup schemes Elevator - Stairs algorithm and logW - Elevators algorithm. For a routing table with N prefixes, The Elevator - Stairs algorithm uses optimal O(N) memory, and achieves better lookup and update times than other methods with similar memory requirements. The logW - Elevators algorithm gives O(log W) lookup time, where W is the length of an IP address, while improving upon update time and memory usage. Experimental results using the MAE-West router with 29,487 prefixes show that the Elevator - Stairs algorithm gives an average throughput of 15.7 Million lookups per second (Mlps) using 459 KB of memory, and the logW - Elevators algorithm gives an average throughput of 21.41 Mlps with a memory usage of 1259 KB.
Natsuhiko Futamura, Rama Sangireddy, Srinivas Aluru, Arun K. Somani
ICCCN1
2003 Parallel biological sequence comparison using prefix computations
Srinivas Aluru, Natsuhiko Futamura, Kishan G. Mehrotra
J. Parallel Distributed Comput.2
2002 Parallel Syntenic Alignments
Natsuhiko Futamura, Srinivas Aluru, Xiaoqiu Huang 0001
HiPC1
2002 Efficient Parallel Algorithms for Solvent Accessible Surface Area of Proteins
abstract
We present faster sequential and parallel algorithms for computing the solvent accessible surface area (ASA) of protein molecules. The ASA is computed by finding the exposed surface areas of the spheres obtained by increasing the van der Waals radii of the atoms with the van der Waals radius of the solvent. Using domain specific knowledge, we show that the number of sphere intersections is only O(n), where n is the number of atoms in the protein molecule. For computing sphere intersections, we present hash-based algorithms that run in O(n) expected sequential time and O(n/p) expected parallel time and sort-based algorithms that run in worst-case O(n log n) sequential time and O(n log n/p) parallel time. These are significant improvements over previously known algorithms which take O(n/sup 2/) time sequentially and O(n/sup 2//p) time in parallel. We present a Monte Carlo algorithm for computing the solvent accessible surface area. The basic idea is to generate points uniformly at random on the surface of spheres obtained by increasing the van der Waals radii of the atoms with the van der Waals radius of the solvent molecule and to test the points for accessibility. We also provide error bounds as a function of the sample size. Experimental verification of the algorithms is carried out using an IBM SP-2.
Natsuhiko Futamura, Srinivas Aluru, Desh Ranjan, Bhanu Hariharan
IEEE Trans. Parallel Distributed Syst.1
2000 A Provably Optimal, Distribution-Independent Parallel Fast Multipole Method
abstract
The Fast Multipole Method (FMM) is a robust technique for the rapid evaluation of the combined effect of pairwise interactions of n data sources. Parallel computation of the FMM is considered a challenging problem due to the dependence of the computation on the distribution of the data sources, usually resulting in dynamic data decomposition and load balancing problems. In this paper, we present the first provably efficient and distribution-independent parallel algorithm for the FMM on distributed memory parallel computers. Our algorithm does not require any dynamic data decomposition or load balancing step. We present our algorithm in terms of a few basic and well understood primitive operations such as sorting and parallel prefix.
Fatih Erdogan Sevilgen, Natsuhiko Futamura, Srinivas Aluru
IPDPS2
1999 A Parallel Monte Carlo Algorithm for Protein Accessible Surface Area Computation
Srinivas Aluru, Desh Ranjan, Natsuhiko Futamura
HiPC3