This paper presents a new design for a ←self-checking checker for nonencoded multiinput combinational circuits. A built-in testing method is also stressed. The proposed checker, called a generalized prediction checker (GPC), has an extended and generalized form of conventional parity prediction checkers, and includes a duplication checker as a special case. A parity check matrix H imparts arbitrary error detection ability to the new GPC. The GPC is made perfectly self-testing by applying a new method that adds one extra input to the cascaded multiinput comparator and to the cascaded XOR tree circuit in the GPC. This extra input may take any value during normal operation. The ←self-checking GPC is implemented for specific circuit examples and verified. For these examples, the ←self-checking GPC's show 100 percent fault coverage for single stuck faults in both the circuit under check and the checker itself. Using this checker, the built-in testing method taking advantage of the checker's automatic fault detection ability is shown to be suitable for testing combinational circuits.

This correspondence demonstrates a new kind of error-checking scheme for multioutput combinational circuits and its use for a built-in testing method. In the error-checking logic employed, the output from the circuits being checked is partitioned into several groups. The predicted group parity is compared to that produced from the output in each group. This checking circuit, called a group-parity prediction (GPP) checker, can be implemented systematically. To ensure that the GPP checker is self-testing, several conditions are required. The self-testing GPP checkers are implemented for some concrete examples of multioutput combinational circuits. With respect to these examples, the self-testing GPP checker shows 87-100 percent error detection ability, and 91-100 percent fault coverage for single stuck faults. Using this self-testing GPP checker, a self-verification testing method, which takes advantage of the automatic fault-detection capability of a checker, is shown to be applicable to testing combinational circuits.