Wireless Sensor Networks (WSNs) are commonly used in safety-critical and security-sensitive applications. However, because these networks have limited resources and operate in open or hostile environments, they are highly vulnerable to node failures, misbehavior, and malicious attacks. This paper proposes EFTE, an Entropy-Weighted Fuzzy Trust Evaluation framework designed to improve trust reliability in WSNs. EFTE measures node trust by evaluating communication efficiency, remaining energy, behavioral consistency, and mobility. Entropy-based weighting is applied to capture uncertainty in each attribute and to determine its relative importance. A fuzzy inference system calculates trust values even when observations are incomplete, and adaptive thresholding is used to identify and isolate untrusted nodes. Lightweight Elliptic Curve Cryptography is integrated to provide secure data communication. A hardware prototype implemented on low-cost IoT devices demonstrates the practical feasibility and computational efficiency of EFTE. Simulation and comparative analysis confirm that EFTE achieves higher malicious node detection accuracy, reduced false positives, improved packet delivery ratio, and extended network lifetime, thereby supporting dependable and secure WSN operation in mission-critical environments.

Differential Fault Attack ( DFA ) is a powerful cryptanalytic technique for recovering cryptographic keys by exploiting computational faults. At Indocrypt 2024, the first DFA on Ascon was introduced using a bit-flip fault model to recover a 64-bit key, followed by a bit-set fault model to extract another 64-bit key. However, this attack lacked practical validation. In this work, we revisit their approach and extend it by generalizing the attack to a more practical and widely accepted random fault model. Given that Ascon is implemented using bit-sliced techniques, we validate our attack through real-world experiments on a ChipWhisperer Lite platform using clock glitching. We demonstrate that the structure of Ascon inherently transforms random register faults into single-bit differences within the S-box operation, making it susceptible to DFA . We evaluate our attack under both nonce-misuse and nonce-respecting scenarios. In the nonce-misuse setting, we recover the first 64-bit key with only 50 random register faults and estimate the fault requirements for key recovery in the nonce-respecting case. Additionally, we identify a structural weakness in the Ascon tag selection process that increases its susceptibility to difference-based fault attacks. To counter this vulnerability, we propose an immediate countermeasure to strengthen its resistance against DFA .

Fully Homomorphic Encryption (FHE) schemes are widely used cryptographic primitives for performing arbitrary computations on encrypted data. However, FHE incorporates a computationally intensive mechanism called bootstrapping, that resets the noise in the ciphertext to a lower level allowing the computation on circuits of arbitrary depth. This process can take significant time, ranging from several minutes to hours. To address the above issue, in this work, we propose an Electronic Design Automation (EDA) framework$\mathsf{FHEDA}$that generates efficient Boolean representations of circuits compatible with the Torus-FHE (ASIACRYPT 2020) scheme. To the best of our knowledge, this is the first work in the EDA domain of FHE. We integrate logic synthesis and gate optimization techniques into our$\mathsf{FHEDA}$framework for reducing the total number of bootstrapping operations in a Boolean circuit, which leads to a significant (up to 50%) reduction in homomorphic computation time. Our$\mathsf{FHEDA}$is built upon the observation that in Torus-FHE two consecutive Boolean gate evaluations over fresh encryptions require only one bootstrapping instead of two, based on appropriate parameter choices. By integrating this observation with logic replacement techniques into$\mathsf{FHEDA}$, we could reduce the total number of bootstrapping operations along with the circuit depth. This eventually reduces the homomorphic evaluation time of Boolean circuits. In order to verify the efficacy of our approach, we assess the performance of the proposed EDA flow on a diverse set of representative benchmarks including privacy-preserving machine learning and different symmetric key block ciphers.