As Large Language Models (LLMs) have reached human-like fluency and coherence, distinguishing machine-generated text (MGT) from human-written content becomes increasingly difficult.While early efforts in MGT detection have focused on binary classification, the growing landscape and diversity of LLMs require a more fine-grained yet challenging authorship attribution (AA), i.e., being able to identify the precise generator (LLM or human) behind a text.However, AA remains nowadays confined to a monolingual setting, with English being the most investigated one, overlooking the multilingual nature and usage of modern LLMs.In this work, we introduce the problem of Multilingual Authorship Attribution, which involves attributing texts to human or multiple LLM generators across diverse languages.Focusing on 18 languages-covering multiple families and writing scripts-and 8 generators (7 LLMs and the human-authored class), we investigate the multilingual suitability of monolingual AA methods in terms of their crosslingual transferability, and the impact of generators on attribution performance.Our results reveal that while certain monolingual AA methods can be adapted to multilingual settings, significant limitations and challenges remain, particularly in transferring across diverse language families, underscoring the complexity of multilingual AA and the need for more robust approaches to better match real-world scenarios.

Recent LLMs are able to generate high-quality multilingual texts, indistinguishable for humans from authentic human-written ones.Research in machine-generated text detection is however mostly focused on the English language and longer texts, such as news articles, scientific papers or student essays.Socialmedia texts are usually much shorter and often feature informal language, grammatical errors, or distinct linguistic items (e.g., emoticons, hashtags).There is a gap in studying the ability of existing methods in detection of such texts, reflected also in the lack of existing multilingual benchmark datasets.To fill this gap we propose the first multilingual (22 languages) and multi-platform (5 social media platforms) dataset for benchmarking machinegenerated text detection in the social-media domain, called MultiSocial 1 .It contains 472,097 texts, of which about 58k are human-written and approximately the same amount is generated by each of 7 multilingual LLMs.We use this benchmark to compare existing detection methods in zero-shot as well as fine-tuned form.Our results indicate that the fine-tuned detectors have no problem to be trained on socialmedia texts and that the platform selection for training matters.

Aneta Zugecova, Dominik Macko, Ivan Srba, Robert Moro, Jakub Kopál, Katarína Marcinčinová, Matúš Mesarčík. Proceedings of the 63rd Annual Meeting of the Association for Computational Linguistics (Volume 1: Long Papers). 2025.

Nafis Irtiza Tripto, Saranya Venkatraman, Dominik Macko, Robert Moro, Ivan Srba, Adaku Uchendu, Thai Le, Dongwon Lee. Proceedings of the 62nd Annual Meeting of the Association for Computational Linguistics (Volume 1: Long Papers). 2024.

Ivan Vykopal, Matúš Pikuliak, Ivan Srba, Robert Moro, Dominik Macko, Maria Bielikova. Proceedings of the 62nd Annual Meeting of the Association for Computational Linguistics (Volume 1: Long Papers). 2024.

Dominik Macko, Robert Moro, Adaku Uchendu, Jason Lucas, Michiharu Yamashita, Matúš Pikuliak, Ivan Srba, Thai Le, Dongwon Lee, Jakub Simko, Maria Bielikova. Proceedings of the 2023 Conference on Empirical Methods in Natural Language Processing. 2023.

Cryptography has been extensively used in Android applications to guarantee secure communications, conceal critical data from reverse engineering, or ensure mobile users' privacy. Various system-based and third-party libraries for Android provide cryptographic functionalities, and previous works mainly explored the misuse of cryptographic API in benign applications. However, the role of cryptographic API has not yet been explored in Android malware. This paper performs a comprehensive, longitudinal analysis of cryptographic API in Android malware. In particular, we analyzed 603 937 Android applications (half of them malicious, half benign) released between 2012 and 2020, gathering more than 1 million cryptographic API expressions. Our results reveal intriguing trends and insights on how and why cryptography is employed in Android malware. For instance, we point out the widespread use of weak hash functions and the late transition from insecure DES to AES. Additionally, we show that cryptography-related characteristics can help to improve the performance of learning-based systems in detecting malicious applications.

A low power or energy efficient hardware operation is nowadays gaining attention. It is especially true for battery-operated or energy-harvesting devices, such as most of the Internet of Things end nodes. For specific applications with rather limited market, the FPGAs are very good alternative. However, evolution of these devices is focused on high-level programming, giving application designers space to focus on application function rather than to be concerned about its low-level implementation on FPGA device - it is handled by automation tools. Thus, new FPGA-application designers are nowadays not very familiar with hardware aspects and it is difficult for them to apply power-reduction techniques in order to create an energy-efficient system. This paper is focused on automation of power-management integration into the FPGA-application design based on abstract specification, which is easy-to-use even for unfamiliar designers. It simplifies and speeds-up the low-power and energy-efficient FPGA-application design process. Moreover, the automation prevents many human-errors and thus it also alleviates the verification process. Experimental results indicate that the proposed power-management scheme is working correctly and it can be automatically generated.

Wireless communication is prone to collisions, resulting from multiple devices transmitting at the same time. It implies subsequent retransmissions, which increase energy consumption of communicating devices and reduce throughput of the network. This is especially critical in Internet of Things (IoT) networks, in which the number of connected devices grows rapidly and the available energy of IoT end devices is rather limited (e.g., energy harvesting and battery powered). The number of retransmissions must be reduced in order the networks to be sustainable. However, in long-range wireless IoT networks, the most effective collision-resolution techniques using a transmission-channel listening to detect collisions cannot be reliably used due to various problems, such as a hidden-node problem or environment interference. In this article, a new solution of this problem is proposed, which consists of a new communication-planning mechanism for low-speed long-range IoT networks with a huge number of communicating energy-constrained devices. The access points (APs) (or IoT gateways) are used to plan the periodically repeated communication into a transmission schedule, allowing only a single IoT device to communicate at a time. This approach results in reduction of collisions, which leads to the increased network throughput, smaller delays, and lower power requirements of energy-constrained devices. The experiments indicate that the proposed approach provides better communication efficiency than the LoRaWAN and Sigfox collision-resolution techniques, when more than 15, respectively 125, end devices communicate with a single AP.

Nowadays, the electronic system design is constrained by several factors. One of them is the system power consumption, since many devices have limited energy source (e.g. Internet of Things sensor devices) - they run on batteries or are powered by energy harvesting from environment. The so-called power management is usually adopted during system design to minimize power consumption of the system under development, which enables to apply very popular power-reduction techniques, such as clock gating, power gating, or voltage and frequency scaling. The specification of power management is not an easy task, and therefore in our previous work, we have proposed a simplification method by increasing abstraction and automation of the design process. In this paper, we are taking the design automation one more step forward by proposal of a method that enables automated specification of system power management using the system architecture and abstract simulation results. The automatically generated power management can reduce the power by tens of percent as showed by the experiments.

High power density is the most crucial problem in deeply integrated hardware systems. Therefore, the power has to be reduced in such systems, what is most commonly achieved by the utilization of power management. Unfortunately, the standardized application of power management is quite complex and does not very well support the system level of design abstraction, which is increasingly used by the industry. An immediately applicable solution to this problem is to use increased automation in the design process, regarding the power management. This paper proposes a tool, called PMS2UPF, which can automatically generate the standard UPF (Unified Power Format) power intent based on the abstract power-management specification in SystemC/PMS. The automated transition between the two abstraction levels not only accelerates the design process, but also prevents possible introduction of human errors into the refined design.

Power management becomes an integral part of hardware-systems design. In modern complex systems, the powermanagement design is not a simple task and it is quite difficult to evaluate whether the designed strategy is the best. In this paper, we propose a new method for overhead estimation of the required power-management unit, based on system-level abstract specification. It enables a designer to explore various power-management strategies in a short time and select the most suitable one. It is especially useful for ultra low-power systems, in which the power-management unit is a significant power consumer. The proposed method is simpler and faster than the existing approaches, and thus it speeds-up the low-power systems development process.

Power consumption becomes a dominant problem in current hardware-systems design. It is most commonly dealt with use of power-management techniques, such as clock gating, power gating, or voltage and frequency scaling. In modern complex systems, power-management adoption is difficult to achieve, and therefore new approaches to simplify power-managed systems design are evolving. We have also proposed such an approach, simplifying power-management specification at the system level of design abstraction. This paper describes the proposed verification approach, which can take place continuously, beginning at the early specification stage of the system development. It helps a designer to create correct and consistent specification of power management.

Power consumption is the greatest concern in current highly-integrated hardware-system design. The power reduction is targeted mostly through power management, implementing such techniques as clock gating, power gating, or voltage and frequency scaling. Due to growing complexity, the start-point in the design has moved from the register-transfer level to the system level. However, the power management lacks the abstraction needed for the system level. Also, different power-management techniques are specified differently, complicating the specification even more. This paper targets the unified specification of power-management techniques early in the design flow. SystemC is used for describing the system functionality along with the power management. Efficiency of the proposed approach is illustrated by comparison of the unified power-management specification and the standardized approach.

Power management is an integral part of almost every new system design. It enables to keep the power under constrains, implementing such power-reduction techniques as power gating, multi-voltage design, or voltage and frequency scaling. Due to the complexity of modern designs, the system level of abstraction is adopted as a design starting point. However, the power management is not yet fully adopted at such abstraction level. In the previous research, we have proposed the abstract power-management specification, simplifying its adoption by an order of magnitude. This paper targets the power-management high-level synthesis, closing thus the gap between the system-level power management and its standard form at lower abstraction levels. Such design automation enables to reduce a number of human errors, potentially introduced by manual design. The presented experimental results validate the proposed approach.

Power consumption is a very important aspect in almost every electronic system design. To minimize the power consumption, many advanced power-reduction techniques have been developed based on a power management. In modern systems the power management unit (PMU) is typically a complex circuit and therefore should also be targeted by power-efficient design techniques. This paper is focused on the design of self-managing PMU that can manage its own power and thus reduce the overall system power consumption. We show that the special power state machine design in the PMU allows to power inactive transition logic elements down during the idle time. We illustrate this design strategy on a simple example where approximately 70% leakage power reduction in transition logic was achieved.

The usage of the HDLs (Hardware Description Languages) in the present digital system development process is indispensable. Although, their great contribution is undeniable, they also bring about several disadvantages. The textual form of an HDL model is less illustrative for a human being than schematic representation of its structure. Moreover, simulation of such models is most commonly displayed in a waveform representation, even though sufficient for verification, it is hard-to-identify design errors. The paper presents a tool for supporting both, the model structure visualization and the simulation results in the visualized structure display.