Demo Data from VLDB 2026 / reviewers in the wild / expert
Benjamin Sepanski
dblp:260/9039
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2022
0000-0002-4924-3009ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Concurrent programming · 30% Program verification · 30% Program synthesis and code generation · 30% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Program verification › dynamic verification › runtime verification
monitor synthesis |
0.6 | 1 | 2022 | Synthesizing fine-grained synchronization protocols for implicit monitors · Proc. ACM Program. Lang. 2022 |
Concurrent programming
synchronization |
0.6 | 1 | 2022 | Synthesizing fine-grained synchronization protocols for implicit monitors · Proc. ACM Program. Lang. 2022 |
Program analysis
static analysis |
0.2 | 1 | 2022 | Synthesizing fine-grained synchronization protocols for implicit monitors · Proc. ACM Program. Lang. 2022 |
Methods — techniques the papers use, named apart from their topics
MaxSAT solving · 0.6
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | Synthesizing fine-grained synchronization protocols for implicit monitorsabstractA monitor is a widely-used concurrent programming abstraction that encapsulates all shared state between threads. Monitors can be classified as being either implicit or explicit depending on the primitives they provide. Implicit monitors are much easier to program but typically not as efficient. To address this gap, there has been recent research on automatically synthesizing explicit-signal monitors from an implicit specification, but prior work does not exploit all paralellization opportunities due to the use of a single lock for the entire monitor. This paper presents a new technique for synthesizing fine-grained explicit-synchronization protocols from implicit monitors. Our method is based on two key innovations: First, we present a new static analysis for inferring safe interleavings that allow violating mutual exclusion of monitor operations without changing its semantics. Second, we use the results of this static analysis to generate a MaxSAT instance whose models correspond to correct-by-construction synchronization protocols. We have implemented our approach in a tool called Cortado and evaluate it on monitors that contain parallelization opportunities. Our evaluation shows that Cortado can synthesize synchronization policies that are competitive with, or even better than, expert-written ones on these benchmarks. Kostas Ferles, Benjamin Sepanski, Rahul Krishnan, James Bornholt, Isil Dillig |
Proc. ACM Program. Lang. | 2 |