VLDB 2026 Research / reviewers in the wild / expert
Alhassan Sayed
dblp:268/2360
· DBLP profile ↗
8ranked-venue papers
0as first author
7since 2021 · last 2022
0000-0002-5556-5733ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 8 · 7 since 2021Software engineering, systems software and programming languages · 1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | Anti-Piracy of Analog and Mixed-Signal Circuits in FD-SOIabstractWe propose an anti-piracy security technique based on locking for analog and mixed-signal circuits designed in FD-SOI. We show that obfuscating the body-bias voltages of tunable transistors is an effective way for inducing high functionality corruption. The obfuscation is achieved by constituting a secret key from the concatenation of the input digital codes of the body-bias generators that produce the correct body-bias voltages. We also propose a slight modification of the body-bias generator that increases prohibitively the time complexity of counter-attacks aiming at finding an approximate key. The proposed locking scheme is demonstrated on a Σ$$ modulator used in highly-digitized RF receiver architectures. Mariam Tlili, Alhassan Sayed, Doaa Mahmoud, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. D. Stratigopoulos |
ASP-DAC | 2 |
| 2022 | Systematic Design For Multistage Feed-forward Op-amp For High-Speed Continuous-Time ∑Δ ADCsabstractThis paper presents a systematic design methodology for multi-stage feed-forward op-amps used in the active filters of continuous time $\Sigma\triangle$ ADC. This methodology can provide the specifications of each stage in the op-amp (from 2 stages to 4 stages) based on the required ADC specifications and can provide an estimate of the Signal to Noise Ratio (SNR) taking into consideration the effect of the transfer function of the opamp. This method is then validated on a Lowpass and Bandpass $\Sigma\triangle$ ADCs. Marco A. Saif, Alhassan Sayed, Michel Vasilevski, Mohamed Dessouky, Hassan Aboushady |
ISCAS | 2 |
| 2022 | Digitally Assisted Mixed-Signal Circuit SecurityabstractThe design and manufacturing steps of a chip typically involve several parties. For example, a chip may comprise several third-party intellectual property (IP) cores and the integrated circuit (IC) fabrication may be outsourced to a third-party foundry. IP cores and ICs are shared with potentially untrusted third parties and, as a result, are subject to piracy attacks. Even more, any legally purchased chip may be reverse engineered to retrieve the design down to transistor level and, thereby, it is also subject to piracy attacks. In this article, we proposeMixLock, an anti-piracy countermeasure for mixed-signal IP cores and ICs.MixLockprotection is based on inserting a lock mechanism into the design such that correct functionality is established only after applying a key which is the designer’s secret. The lock mechanism acts on the mixed-signal performances by leveraging logic locking of the digital part.MixLockpresents several key attributes. It is generally applicable, it is nonintrusive to the sensitive analog section, it incurs no performance penalty and has very low area and power overheads, it is fully automated, and it is capable of co-optimizing security in both the analog and digital domains. We demonstrateMixLockon a$\Sigma \Delta $analog-to-digital converter (ADC) using hardware measurements and an audio demonstrator. Julian Leonhard, Nimisha Limaye, Shadi Turk, Alhassan Sayed, Alán Rodrigo Díaz Rizo, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 4 |
| 2022 | Digital-to-Analog Hardware Trojan AttacksabstractWe propose a Hardware Trojan (HT) attack for analog circuits with its key characteristic being that it cannot be prevented or detected in the analog domain. The HT attack works in the context of Systems-on-Chip (SoCs) comprising both digital and analog Intellectual Property (IP) blocks. The attacker could be either the SoC integrator or the foundry. More specifically, the HT trigger is placed inside a dense digital IP block where it can be effectively hidden, whereas the HT payload is in the form of a digital pattern transported via the test bus or generated within the test bus, reaching the Design-for-Test (DfT) or programmability interface of the victim analog IP with the test bus. The HT payload unexpectedly activates the DfT and sets the victim analog IP into some possibly partial and undocumented test mode or changes the nominal programmability. The HT payload can be designed to result in performance degradation or complete malfunction, i.e., denial of service. We demonstrate this HT attack scenario on two analog IPs, namely a low-dropout (LDO) regulator using simulation and an RF receiver using hardware measurements. Mohamed Elshamy, Giorgio Di Natale, Alhassan Sayed, Antonios Pavlidis, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. D. Stratigopoulos |
IEEE Trans. Circuits Syst. I Regul. Pap. | 3 |
| 2021 | Cognitive Radio Circuits and Systems - Application to DigitizersabstractThis paper gives an overview of Cognitive-Radio (CR) circuits and systems, that will enable the implementation of new technology paradigms such as software-defined electronics and Artificial Intelligence (AI) managed Internet-of-Things (IoT). A survey of the state of the art, trends and design challenges is presented from a top-down perspective - from system-level to circuit and chip implementation. As an application, special emphasis is put on analog/digital interfaces as one of the key building blocks in CR-based devices. Cutting-edge architectures - mostly based on ΣΔ Modulators (ΣΔMs) - are discussed, as well as the best candidate circuit strategies to implement CR- based digitizers in deep nanometer CMOS. Hassan Aboushady, Alhassan Sayed, Luis A. Camuñas-Mesa, José M. de la Rosa 0001 |
ISCAS | 2 |
| 2021 | Analog and Mixed-Signal IC Security via Sizing CamouflagingabstractWe treat the problem of analog integrated circuit (IC) obfuscation toward intellectual property (IP) protection against reverse engineering. Obfuscation is achieved by camouflaging the effective geometry of layout components via the use of fake contacts, which originally were proposed for gate camouflaging in digital ICs. We present a library of obfuscated layout components, we give recommendations for effective camouflaging, we discuss foreseen attacks and the achieved resiliency, and we propose security metrics for assessing the hardness of reverse engineering. The proposed methodology is demonstrated on an operational amplifier and an RF ΣΔ analog-to-digital converter (ADC). Julian Leonhard, Alhassan Sayed, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. D. Stratigopoulos |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 2021 | Locking by Untuning: A Lock-Less Approach for Analog and Mixed-Signal IC SecurityabstractWe propose an antipiracy security approach for programmable analog and mixed-signal (AMS) integrated circuits (ICs). The security approach relies on functionality locking by leveraging the inherent programmability and utilizing the configuration settings as secret keys or, equivalently, the programming bits as key bits. When invalid keys are applied, the circuit is untuned and, as a result, its functionality breaks, i.e., at least one of the performances violates its specification. As long as the calibration algorithm that produces the configuration settings can be kept secret, the proposed approach can serve as a countermeasure against all types of counterfeiting, i.e., cloning, overbuilding, remarking, and recycling. An important advantage of the proposed approach is that it is lock-less. It leaves the design intact, there is no change to the design flow, and there are no performance penalty and no area or power overheads due to the lock operation. We demonstrate it on a$\Sigma \Delta $analog-to-digital converter (ADC) with 194-bit programmability and complex calibration algorithm used in the context of highly digitized, multistandard RF receivers. Mohamed Elshamy, Alhassan Sayed, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. D. Stratigopoulos |
IEEE Trans. Very Large Scale Integr. Syst. | 2 |
| 2020 | Securing Programmable Analog ICs Against PiracyabstractIn this paper, we demonstrate a security approach for the class of highly-programmable analog Integrated Circuits (ICs) that can be used as a countermeasure for unauthorized chip use and piracy. The approach relies on functionality locking, i.e. a lock mechanism is introduced into the design such that unless the correct key is provided the functionality breaks. We show that for highly-programmable analog ICs the programmable fabric can naturally be used as the lock mechanism. We demonstrate the approach on a multi-standard RF receiver with configuration settings of 64-bit words. Mohamed Elshamy, Alhassan Sayed, Marie-Minerve Louërat, Amine Rhouni, Hassan Aboushady, Haralampos-G. D. Stratigopoulos |
DATE | 2 |